diff mbox series

[v4] dt-bindings: clock: versal: Add versal-net compatible string

Message ID 20230620110137.5701-1-shubhrajyoti.datta@amd.com
State Not Applicable, archived
Headers show
Series [v4] dt-bindings: clock: versal: Add versal-net compatible string | expand

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Commit Message

Shubhrajyoti Datta June 20, 2023, 11:01 a.m. UTC 
Add dt-binding documentation for Versal NET platforms.
Versal Net is a new AMD/Xilinx  SoC.

The SoC and its architecture is based on the Versal ACAP device.
The Versal Net  device includes more security features in the
platform management controller (PMC) and increases the number of
CPUs in the application processing unit (APU) and the real-time
processing unit (RPU).

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@xilinx.com>
Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>

---
For the list of peripherals  please check 
https://github.com/Xilinx/u-boot-xlnx/blob/master/arch/arm/dts/versal-net.dtsi

Changes in v4:
Add description for for versal net

Changes in v3:
Add the compatible for versal net
the usage will new compatible string followed by old one

 .../devicetree/bindings/clock/xlnx,versal-clk.yaml         | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

Comments

Krzysztof Kozlowski June 20, 2023, 11:07 a.m. UTC | #1 
On 20/06/2023 13:01, Shubhrajyoti Datta wrote:
> Add dt-binding documentation for Versal NET platforms.
> Versal Net is a new AMD/Xilinx  SoC.
> 
> The SoC and its architecture is based on the Versal ACAP device.
> The Versal Net  device includes more security features in the
> platform management controller (PMC) and increases the number of
> CPUs in the application processing unit (APU) and the real-time
> processing unit (RPU).
> 
> Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@xilinx.com>
> Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof
Stephen Boyd July 19, 2023, 8:09 p.m. UTC | #2 
Quoting Shubhrajyoti Datta (2023-06-20 04:01:37)
> Add dt-binding documentation for Versal NET platforms.
> Versal Net is a new AMD/Xilinx  SoC.
> 
> The SoC and its architecture is based on the Versal ACAP device.
> The Versal Net  device includes more security features in the
> platform management controller (PMC) and increases the number of
> CPUs in the application processing unit (APU) and the real-time
> processing unit (RPU).
> 
> Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@xilinx.com>
> Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
> 
> ---

Applied to clk-next
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml b/Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml
index 229af98b1d30..b90aa064a6d3 100644
--- a/Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml
+++ b/Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml
@@ -20,7 +20,12 @@  select: false
 
 properties:
   compatible:
-    const: xlnx,versal-clk
+    oneOf:
+      - const: xlnx,versal-clk
+      - items:
+          - enum:
+              - xlnx,versal-net-clk
+          - const: xlnx,versal-clk
 
   "#clock-cells":
     const: 1