| Message ID | 20230518113800.339158-3-srinivas.kandagatla@linaro.org |
|---|---|
| State | Superseded, archived |
| Headers | show |
| Series | clk: qcom: sc8280xp: add lpasscc reset control | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/patch-applied | success | |
| robh/dtbs-check | warning | build log |
| robh/dt-meta-schema | success |
On Thu, May 18, 2023 at 12:37:57PM +0100, Srinivas Kandagatla wrote: > The LPASS(Low Power Audio Subsystem) Audio clock provider provides reset Missing space after "LPASS". Same comments as on previous patch seem to apply to the reset of the commit message. > controller support when is driven by the Q6DSP. > This patch adds support for those resets and adds IDs for clients > to request the reset. > > Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> > --- > .../bindings/clock/qcom,sc8280xp-lpasscc.yaml | 11 +++++++++++ > include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h | 5 +++++ > 2 files changed, 16 insertions(+) > > diff --git a/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml > index 7c30614a0af9..394833819ba3 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml > @@ -22,6 +22,7 @@ properties: > compatible: > enum: > - qcom,sc8280xp-lpasscc > + - qcom,sc8280xp-lpassaudiocc Add before lpasscc to maintain alphabetical sorting. > > '#reset-cells': > const: 1 > @@ -45,6 +46,16 @@ required: > additionalProperties: false > > examples: > + - | > + #include <dt-bindings/clock/qcom,lpasscc-sc8280xp.h> > + lpass_audiocc: clock-controller@3300000 { > + compatible = "qcom,sc8280xp-lpassaudiocc"; 4-space indentation. > + reg = <0x32a9000 0x1000>; Does not match node unit address either. > + #reset-cells = <1>; > + #clock-cells = <1>; > + qcom,adsp-pil-mode; Keep cells provider cells properties last? > + }; > + > - | > #include <dt-bindings/clock/qcom,lpasscc-sc8280xp.h> > lpasscc: clock-controller@3900000 { > diff --git a/include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h b/include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h > index df800ea2741c..d190d57fc81a 100644 > --- a/include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h > +++ b/include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h > @@ -6,6 +6,11 @@ > #ifndef _DT_BINDINGS_CLK_QCOM_LPASSCC_SC8280XP_H > #define _DT_BINDINGS_CLK_QCOM_LPASSCC_SC8280XP_H > > +/* LPASS AUDIO CC CSR */ > +#define LPASS_AUDIO_SWR_RX_CGCR 0 > +#define LPASS_AUDIO_SWR_WSA_CGCR 1 > +#define LPASS_AUDIO_SWR_WSA2_CGCR 2 > + > /* LPASS TCSR */ > #define LPASS_AUDIO_SWR_TX_CGCR 0 Johan
diff --git a/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml index 7c30614a0af9..394833819ba3 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml @@ -22,6 +22,7 @@ properties: compatible: enum: - qcom,sc8280xp-lpasscc + - qcom,sc8280xp-lpassaudiocc '#reset-cells': const: 1 @@ -45,6 +46,16 @@ required: additionalProperties: false examples: + - | + #include <dt-bindings/clock/qcom,lpasscc-sc8280xp.h> + lpass_audiocc: clock-controller@3300000 { + compatible = "qcom,sc8280xp-lpassaudiocc"; + reg = <0x32a9000 0x1000>; + #reset-cells = <1>; + #clock-cells = <1>; + qcom,adsp-pil-mode; + }; + - | #include <dt-bindings/clock/qcom,lpasscc-sc8280xp.h> lpasscc: clock-controller@3900000 { diff --git a/include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h b/include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h index df800ea2741c..d190d57fc81a 100644 --- a/include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h +++ b/include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h @@ -6,6 +6,11 @@ #ifndef _DT_BINDINGS_CLK_QCOM_LPASSCC_SC8280XP_H #define _DT_BINDINGS_CLK_QCOM_LPASSCC_SC8280XP_H +/* LPASS AUDIO CC CSR */ +#define LPASS_AUDIO_SWR_RX_CGCR 0 +#define LPASS_AUDIO_SWR_WSA_CGCR 1 +#define LPASS_AUDIO_SWR_WSA2_CGCR 2 + /* LPASS TCSR */ #define LPASS_AUDIO_SWR_TX_CGCR 0
The LPASS(Low Power Audio Subsystem) Audio clock provider provides reset controller support when is driven by the Q6DSP. This patch adds support for those resets and adds IDs for clients to request the reset. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> --- .../bindings/clock/qcom,sc8280xp-lpasscc.yaml | 11 +++++++++++ include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h | 5 +++++ 2 files changed, 16 insertions(+)