| Message ID | 20230426-payphone-nautical-7098d15035c8@wendy |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | Handle multi-letter extensions starting with caps in riscv,isa | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/patch-applied | success | |
| robh/dtbs-check | warning | build log |
| robh/dt-meta-schema | success |
On Wed, Apr 26, 2023 at 11:43:25AM +0100, Conor Dooley wrote: > "Ease of parsing" may have been the initial argument for keeping this > string in lower-case, but parsers may have been written that expect > lower-case only. > For example, the one in released kernels currently does not behave > correctly for multi-letter extensions that begin with a capital letter. > Allowing upper-case here brings about no benefit but would break > compatibility between new devicetrees and older kernels. > > Drop the comment to avoid confusing people. > > Signed-off-by: Conor Dooley <conor.dooley@microchip.com> > --- > Documentation/devicetree/bindings/riscv/cpus.yaml | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml > index f24cf9601c6e..9e273a3264e3 100644 > --- a/Documentation/devicetree/bindings/riscv/cpus.yaml > +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml > @@ -86,7 +86,7 @@ properties: > > While the isa strings in ISA specification are case > insensitive, letters in the riscv,isa string must be all > - lowercase to simplify parsing. > + lowercase. > $ref: "/schemas/types.yaml#/definitions/string" > pattern: ^rv(?:64|32)imaf?d?q?c?b?k?j?p?v?h?(?:[hsxz](?:[a-z])+)?(?:_[hsxz](?:[a-z])+)*$ > > -- > 2.39.2 > Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
On Wed, 26 Apr 2023 11:43:25 +0100, Conor Dooley wrote: > "Ease of parsing" may have been the initial argument for keeping this > string in lower-case, but parsers may have been written that expect > lower-case only. > For example, the one in released kernels currently does not behave > correctly for multi-letter extensions that begin with a capital letter. > Allowing upper-case here brings about no benefit but would break > compatibility between new devicetrees and older kernels. > > Drop the comment to avoid confusing people. > > Signed-off-by: Conor Dooley <conor.dooley@microchip.com> > --- > Documentation/devicetree/bindings/riscv/cpus.yaml | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Acked-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml index f24cf9601c6e..9e273a3264e3 100644 --- a/Documentation/devicetree/bindings/riscv/cpus.yaml +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml @@ -86,7 +86,7 @@ properties: While the isa strings in ISA specification are case insensitive, letters in the riscv,isa string must be all - lowercase to simplify parsing. + lowercase. $ref: "/schemas/types.yaml#/definitions/string" pattern: ^rv(?:64|32)imaf?d?q?c?b?k?j?p?v?h?(?:[hsxz](?:[a-z])+)?(?:_[hsxz](?:[a-z])+)*$
"Ease of parsing" may have been the initial argument for keeping this string in lower-case, but parsers may have been written that expect lower-case only. For example, the one in released kernels currently does not behave correctly for multi-letter extensions that begin with a capital letter. Allowing upper-case here brings about no benefit but would break compatibility between new devicetrees and older kernels. Drop the comment to avoid confusing people. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> --- Documentation/devicetree/bindings/riscv/cpus.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)