Message ID | 20230401111934.130844-17-hal.feng@starfivetech.com |
---|---|
State | Not Applicable, archived |
Headers | show |
Series | Basic clock, reset & device tree support for StarFive JH7110 RISC-V SoC | expand |
Context | Check | Description |
---|---|---|
robh/checkpatch | success | |
robh/patch-applied | success | |
robh/dtbs-check | warning | build log |
robh/dt-meta-schema | success |
diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Documentation/devicetree/bindings/timer/sifive,clint.yaml index aada6957216c..94bef9424df1 100644 --- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml +++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml @@ -31,6 +31,7 @@ properties: - enum: - sifive,fu540-c000-clint - starfive,jh7100-clint + - starfive,jh7110-clint - canaan,k210-clint - const: sifive,clint0 - items: