| Message ID | 20230308155838.1094920-4-abel.vesa@linaro.org |
|---|---|
| State | Superseded, archived |
| Headers | show |
| Series | Add dedicated Qcom ICE driver | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/patch-applied | success | |
| robh/dtbs-check | warning | build log |
| robh/dt-meta-schema | success |
On 08/03/2023 16:58, Abel Vesa wrote: > The ICE will have its own devicetree node, so drop the ICE core clock > and add the qcom,ice property instead. > > Signed-off-by: Abel Vesa <abel.vesa@linaro.org> > --- > > This patch was not part of the v1. > > Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 9 ++++----- > 1 file changed, 4 insertions(+), 5 deletions(-) > > diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml > index 64df6919abaf..92f6316c423f 100644 > --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml > +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml > @@ -80,7 +80,6 @@ properties: > - const: iface > - const: core > - const: xo > - - const: ice Same as for UFS - order is fixed, you cannot drop entries from the middle. > - const: bus > - const: cal > - const: sleep > @@ -120,6 +119,10 @@ properties: Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml index 64df6919abaf..92f6316c423f 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml @@ -80,7 +80,6 @@ properties: - const: iface - const: core - const: xo - - const: ice - const: bus - const: cal - const: sleep @@ -120,6 +119,10 @@ properties: $ref: /schemas/types.yaml#/definitions/uint32 description: platform specific settings for DLL_CONFIG reg. + qcom,ice: + $ref: /schemas/types.yaml#/definitions/phandle + description: phandle to the Inline Crypto Engine node + iommus: minItems: 1 maxItems: 8 @@ -180,14 +183,12 @@ allOf: - description: Host controller register map - description: SD Core register map - description: CQE register map - - description: Inline Crypto Engine register map reg-names: minItems: 2 items: - const: hc - const: core - const: cqhci - - const: ice else: properties: reg: @@ -195,13 +196,11 @@ allOf: items: - description: Host controller register map - description: CQE register map - - description: Inline Crypto Engine register map reg-names: minItems: 1 items: - const: hc - const: cqhci - - const: ice unevaluatedProperties: false
The ICE will have its own devicetree node, so drop the ICE core clock and add the qcom,ice property instead. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> --- This patch was not part of the v1. Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-)