From patchwork Wed Mar 1 18:37:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Rokosov X-Patchwork-Id: 1750191 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=sberdevices.ru header.i=@sberdevices.ru header.a=rsa-sha256 header.s=mail header.b=pQqWLSxI; dkim-atps=neutral Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4PRjft427sz1yWw for ; Thu, 2 Mar 2023 05:38:30 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229952AbjCASi0 (ORCPT ); Wed, 1 Mar 2023 13:38:26 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45278 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229498AbjCASiZ (ORCPT ); Wed, 1 Mar 2023 13:38:25 -0500 Received: from mx.sberdevices.ru (mx.sberdevices.ru [45.89.227.171]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 97EA57ABA; Wed, 1 Mar 2023 10:38:23 -0800 (PST) Received: from s-lin-edge02.sberdevices.ru (localhost [127.0.0.1]) by mx.sberdevices.ru (Postfix) with ESMTP id E9A245FD7B; Wed, 1 Mar 2023 21:38:21 +0300 (MSK) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sberdevices.ru; s=mail; t=1677695902; bh=4lzSSRDAueTokG7idMRN6V/pw7/JIu4u9zzIQC9zTX4=; h=From:To:Subject:Date:Message-ID:MIME-Version:Content-Type; b=pQqWLSxIV/7BWZpjAVSDayCrgqzpSsQT2+07DHiHUUgvhzT2lEN+3EFRsdAVVlMcJ I95/9LfOvE19zAerE7bAaF33j2t2+1u8Bq+Kzc0oE8qJigbtFY59vvY3QCH2nnT1KL Zk2Iq1yU6YSlEycQMtNzyZ7EivNDo44js/2A3pVo77bbGJV2NS1hQedx35aJkp1alj eDpYyADlZV6YvsAOnLdiBml0H7/zcx5Zw7LaUSYCsVX+jxPVZL8L14EoxCfUJtOatr j6+IT689Jj7skdRBMzQyiXb9j8zg366MPM7zxWv0LA+u98WxuQ6o8+rRmWp2rsQG2U +gUeLXYTF25Gg== Received: from S-MS-EXCH01.sberdevices.ru (S-MS-EXCH01.sberdevices.ru [172.16.1.4]) by mx.sberdevices.ru (Postfix) with ESMTP; Wed, 1 Mar 2023 21:38:21 +0300 (MSK) From: Dmitry Rokosov To: , , , , , , , CC: , , , , , , , , Dmitry Rokosov Subject: [PATCH v9 3/5] dt-bindings: clock: meson: add A1 PLL clock controller bindings Date: Wed, 1 Mar 2023 21:37:57 +0300 Message-ID: <20230301183759.16163-4-ddrokosov@sberdevices.ru> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20230301183759.16163-1-ddrokosov@sberdevices.ru> References: <20230301183759.16163-1-ddrokosov@sberdevices.ru> MIME-Version: 1.0 X-Originating-IP: [172.16.1.6] X-ClientProxiedBy: S-MS-EXCH01.sberdevices.ru (172.16.1.4) To S-MS-EXCH01.sberdevices.ru (172.16.1.4) X-KSMG-Rule-ID: 4 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Status: not scanned, disabled by settings X-KSMG-AntiSpam-Interceptor-Info: not scanned X-KSMG-AntiPhishing: not scanned, disabled by settings X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 1.1.2.30, bases: 2023/03/01 14:15:00 #20905952 X-KSMG-AntiVirus-Status: Clean, skipped X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the documentation for Amlogic A1 PLL clock driver, and A1 PLL clock controller bindings. Also include new A1 clock controller dt bindings to MAINTAINERS. Signed-off-by: Jian Hu Signed-off-by: Dmitry Rokosov --- .../bindings/clock/amlogic,a1-pll-clkc.yaml | 59 +++++++++++++++++++ MAINTAINERS | 1 + include/dt-bindings/clock/a1-pll-clkc.h | 20 +++++++ 3 files changed, 80 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml create mode 100644 include/dt-bindings/clock/a1-pll-clkc.h diff --git a/Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml new file mode 100644 index 000000000000..8bd2c948df86 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/amlogic,a1-pll-clkc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Amlogic Meson A/C serials PLL Clock Control Unit + +maintainers: + - Neil Armstrong + - Jerome Brunet + - Jian Hu + - Dmitry Rokosov + +properties: + compatible: + const: amlogic,a1-pll-clkc + + '#clock-cells': + const: 1 + + reg: + maxItems: 1 + + clocks: + items: + - description: input fixpll_in + - description: input hifipll_in + + clock-names: + items: + - const: fixpll_in + - const: hifipll_in + +required: + - compatible + - '#clock-cells' + - reg + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include + apb { + #address-cells = <2>; + #size-cells = <2>; + + clock-controller@7c80 { + compatible = "amlogic,a1-pll-clkc"; + reg = <0 0x7c80 0 0x18c>; + #clock-cells = <1>; + clocks = <&clkc_periphs CLKID_FIXPLL_IN>, + <&clkc_periphs CLKID_HIFIPLL_IN>; + clock-names = "fixpll_in", "hifipll_in"; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 39ff1a717625..8438bc9bd636 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1895,6 +1895,7 @@ L: linux-amlogic@lists.infradead.org S: Maintained F: Documentation/devicetree/bindings/clock/amlogic* F: drivers/clk/meson/ +F: include/dt-bindings/clock/a1* F: include/dt-bindings/clock/gxbb* F: include/dt-bindings/clock/meson* diff --git a/include/dt-bindings/clock/a1-pll-clkc.h b/include/dt-bindings/clock/a1-pll-clkc.h new file mode 100644 index 000000000000..3a559518c6e6 --- /dev/null +++ b/include/dt-bindings/clock/a1-pll-clkc.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ +/* + * Copyright (c) 2019 Amlogic, Inc. All rights reserved. + * Author: Jian Hu + * + * Copyright (c) 2023, SberDevices. All Rights Reserved. + * Author: Dmitry Rokosov + */ + +#ifndef __A1_PLL_CLKC_H +#define __A1_PLL_CLKC_H + +#define CLKID_FIXED_PLL 1 +#define CLKID_FCLK_DIV2 6 +#define CLKID_FCLK_DIV3 7 +#define CLKID_FCLK_DIV5 8 +#define CLKID_FCLK_DIV7 9 +#define CLKID_HIFI_PLL 10 + +#endif /* __A1_PLL_CLKC_H */