| Message ID | 20230203164854.390080-4-krzysztof.kozlowski@linaro.org |
|---|---|
| State | Accepted, archived |
| Headers | show |
| Series | [1/5] dt-bindings: pinctrl: qcom,sc7280-lpass-lpi: correct GPIO name pattern | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/patch-applied | success | |
| robh/dtbs-check | warning | build log |
| robh/dt-meta-schema | success |
On Fri, Feb 03, 2023 at 05:48:53PM +0100, Krzysztof Kozlowski wrote: > The SC8280XP LPASS pin controller has GPIOs 0-18, so correct the number > of GPIOs in gpio-ranges. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- > .../bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Acked-by: Rob Herring <robh@kernel.org>
On Fri, 3 Feb 2023 17:48:53 +0100, Krzysztof Kozlowski wrote: > The SC8280XP LPASS pin controller has GPIOs 0-18, so correct the number > of GPIOs in gpio-ranges. > > Applied, thanks! [4/5] dt-bindings: pinctrl: qcom,sc8280xp-lpass-lpi: correct gpio-ranges https://git.kernel.org/krzk/linux-dt/c/315dffb843f75cec4458714f4d151d5775e797de Best regards,
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml index 9a3f1fb8c2f7..200b3b6ccd87 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml @@ -134,7 +134,7 @@ examples: clock-names = "core", "audio"; gpio-controller; #gpio-cells = <2>; - gpio-ranges = <&lpi_tlmm 0 0 18>; + gpio-ranges = <&lpi_tlmm 0 0 19>; dmic01-state { dmic01-clk-pins {
The SC8280XP LPASS pin controller has GPIOs 0-18, so correct the number of GPIOs in gpio-ranges. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- .../bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)