| Message ID | 20230130134328.178591-1-brgl@bgdev.pl |
|---|---|
| State | Changes Requested, archived |
| Headers | show |
| Series | dt-bindings: watchdog: qcom-wdt: add the interrupts property | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/patch-applied | success | |
| robh/dtbs-check | warning | build log |
| robh/dt-meta-schema | success |
On Mon, Jan 30, 2023 at 02:43:28PM +0100, Bartosz Golaszewski wrote: > From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > > The interrupts property is used in all nodes using this binding but not > defined in the document itself - hence dtbs_check fails for them. Add > the property and update the example. > > Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > --- > .../devicetree/bindings/watchdog/qcom-wdt.yaml | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml b/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml > index 27fb484d5f8d..45940d643b92 100644 > --- a/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml > +++ b/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml > @@ -46,6 +46,10 @@ properties: > clocks: > maxItems: 1 > > + interrupts: > + minItems: 1 > + maxItems: 5 What is each interrupt? > + > required: > - compatible > - reg > @@ -55,9 +59,16 @@ unevaluatedProperties: false > > examples: > - | > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + > watchdog@208a038 { > compatible = "qcom,kpss-wdt-ipq8064"; > reg = <0x0208a038 0x40>; > clocks = <&sleep_clk>; > timeout-sec = <10>; > + interrupts = <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>, > + <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>, > + <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>, > + <GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>, > + <GIC_PPI 5 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>; > }; > -- > 2.37.2 >
On 30/01/2023 14:43, Bartosz Golaszewski wrote: > From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > > The interrupts property is used in all nodes using this binding but not > defined in the document itself - hence dtbs_check fails for them. Add > the property and update the example. > > Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > --- > .../devicetree/bindings/watchdog/qcom-wdt.yaml | 11 +++++++++++ > 1 file changed, 11 insertions(+) dfn in lore would save you some effort (or my pending branch which I shared on IRC): https://lore.kernel.org/all/20230113103346.29381-6-krzysztof.kozlowski@linaro.org/ Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml b/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml index 27fb484d5f8d..45940d643b92 100644 --- a/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml @@ -46,6 +46,10 @@ properties: clocks: maxItems: 1 + interrupts: + minItems: 1 + maxItems: 5 + required: - compatible - reg @@ -55,9 +59,16 @@ unevaluatedProperties: false examples: - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + watchdog@208a038 { compatible = "qcom,kpss-wdt-ipq8064"; reg = <0x0208a038 0x40>; clocks = <&sleep_clk>; timeout-sec = <10>; + interrupts = <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>, + <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>, + <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>, + <GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>, + <GIC_PPI 5 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>; };