Message ID | 20221123123004.7216-1-cniedermaier@dh-electronics.com |
---|---|
State | Changes Requested, archived |
Headers | show |
Series | [V2,1/4] dt_bindings: rs485: Add binding for GPIO that controls Rx enable during Tx | expand |
Context | Check | Description |
---|---|---|
robh/checkpatch | warning | total: 0 errors, 1 warnings, 10 lines checked |
robh/patch-applied | success | |
robh/dtbs-check | warning | build log |
robh/dt-meta-schema | success | |
robh/checkpatch | warning | total: 0 errors, 1 warnings, 10 lines checked |
robh/patch-applied | success | |
robh/dtbs-check | warning | build log |
robh/dt-meta-schema | success |
On 23/11/2022 13:30, Christoph Niedermaier wrote: > This patch adds a binding for a generic definition of an output GPIO that Do not use "This commit/patch". https://elixir.bootlin.com/linux/v5.17.1/source/Documentation/process/submitting-patches.rst#L95 > indicates the state of rs485-rx-during-tx. The idea is that the hardware 1. Use subject prefixes matching the subsystem (git log --oneline -- ...). (no underscores) 2. Subject: drop second, redundant "bindings". So it could look like: dt-bindings: serial: rs485: Add GPIO controlling RX enable during TX For the ack of contents, I'll leave it to Rob as he was involved in v1 discussion. Best regards, Krzysztof
On Wed, Nov 23, 2022 at 01:30:01PM +0100, Christoph Niedermaier wrote: > This patch adds a binding for a generic definition of an output GPIO that > indicates the state of rs485-rx-during-tx. The idea is that the hardware > already controls the option receiving during sending before it gets to the > signal receiving hardware. The standard RS485 is a half-duplex bus that in > most cases is driven by an UART controller. The advantage of using this > GPIO is that it is independent of the capabilities of the UART core and > the UART driver. On the hardware side the interface to the bus is > controlled by a transceiver, that has a pin called RE (RX enable) or > similar, which connects the bus to the RX signal of the UART controller. > The GPIO can switch between two states to control the RE pin via an > electrical circuit: > - Active: > The RE pin is always active. The UART RX see everything on the bus and > therefore also what happens with the TX signal on the bus. > - Inactive: > The RE pin is always active, but during sending on the bus the pin RE is > inactive. So basically the receiving during sending is suppressed. > > A possible circuit diagram could look like this: > ┌──────────────────┐ > │ RS485 │ > TX ───────────────┤D │ > │ Transceiver │ > RTS ────┬──────────┤DE │ > │ │ │ > │ ┌─────┐ │ │ > └─┤& │ │ │ > │ ├──┤!RE │ > !rx_during_tx_gpio ──────┤ │ │ │ > └─────┘ │ │ > │ │ > RX ───────────────┤R │ > │ │ > └──────────────────┘ > > Here the RTS pin of the UART core is used to control TX via the transceiver > pin DE (Drive Enable). RE and rx_during_tx_gpio are active low. > > Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com> > --- > Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> > Cc: Rob Herring <robh+dt@kernel.org> > Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> > Cc: Alexander Dahl <ada@thorsis.com> > Cc: Marek Vasut <marex@denx.de> > Cc: kernel@dh-electronics.com > Cc: devicetree@vger.kernel.org > To: linux-serial@vger.kernel.org > To: linux-arm-kernel@lists.infradead.org > --- > V2: - Rework of the commit message > - Rework GPIO property comment > --- > Documentation/devicetree/bindings/serial/rs485.yaml | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/Documentation/devicetree/bindings/serial/rs485.yaml b/Documentation/devicetree/bindings/serial/rs485.yaml > index 90a1bab40f05..6d780911e342 100644 > --- a/Documentation/devicetree/bindings/serial/rs485.yaml > +++ b/Documentation/devicetree/bindings/serial/rs485.yaml > @@ -51,6 +51,10 @@ properties: > description: GPIO pin to enable RS485 bus termination. > maxItems: 1 > > + rs485-rx-during-tx-gpios: > + description: Output GPIO pin that indicates the state of rs485-rx-during-tx. An output sets the state. An input samples or indicates the state. This should include something about the active state: The active state enables RX during TX. > + maxItems: 1 > + > additionalProperties: true > > ... > -- > 2.11.0 > >
diff --git a/Documentation/devicetree/bindings/serial/rs485.yaml b/Documentation/devicetree/bindings/serial/rs485.yaml index 90a1bab40f05..6d780911e342 100644 --- a/Documentation/devicetree/bindings/serial/rs485.yaml +++ b/Documentation/devicetree/bindings/serial/rs485.yaml @@ -51,6 +51,10 @@ properties: description: GPIO pin to enable RS485 bus termination. maxItems: 1 + rs485-rx-during-tx-gpios: + description: Output GPIO pin that indicates the state of rs485-rx-during-tx. + maxItems: 1 + additionalProperties: true ...
This patch adds a binding for a generic definition of an output GPIO that indicates the state of rs485-rx-during-tx. The idea is that the hardware already controls the option receiving during sending before it gets to the signal receiving hardware. The standard RS485 is a half-duplex bus that in most cases is driven by an UART controller. The advantage of using this GPIO is that it is independent of the capabilities of the UART core and the UART driver. On the hardware side the interface to the bus is controlled by a transceiver, that has a pin called RE (RX enable) or similar, which connects the bus to the RX signal of the UART controller. The GPIO can switch between two states to control the RE pin via an electrical circuit: - Active: The RE pin is always active. The UART RX see everything on the bus and therefore also what happens with the TX signal on the bus. - Inactive: The RE pin is always active, but during sending on the bus the pin RE is inactive. So basically the receiving during sending is suppressed. A possible circuit diagram could look like this: ┌──────────────────┐ │ RS485 │ TX ───────────────┤D │ │ Transceiver │ RTS ────┬──────────┤DE │ │ │ │ │ ┌─────┐ │ │ └─┤& │ │ │ │ ├──┤!RE │ !rx_during_tx_gpio ──────┤ │ │ │ └─────┘ │ │ │ │ RX ───────────────┤R │ │ │ └──────────────────┘ Here the RTS pin of the UART core is used to control TX via the transceiver pin DE (Drive Enable). RE and rx_during_tx_gpio are active low. Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com> --- Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> Cc: Alexander Dahl <ada@thorsis.com> Cc: Marek Vasut <marex@denx.de> Cc: kernel@dh-electronics.com Cc: devicetree@vger.kernel.org To: linux-serial@vger.kernel.org To: linux-arm-kernel@lists.infradead.org --- V2: - Rework of the commit message - Rework GPIO property comment --- Documentation/devicetree/bindings/serial/rs485.yaml | 4 ++++ 1 file changed, 4 insertions(+)