| Message ID | 20220927173702.5200-29-krzysztof.kozlowski@linaro.org |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | pinctrl/arm64: qcom: continued - fix Qualcomm TLMM pinctrl schema warnings | expand |
On Tue, 27 Sep 2022 19:36:56 +0200, Krzysztof Kozlowski wrote: > The TLMM pin controller follows generic pin-controller bindings, so > should have subnodes with '-state' and '-pins'. Otherwise the subnodes > (level one and two) are not properly matched. > > qcom-sdx55-telit-fn980-tlb.dtb: pinctrl@f100000: 'pcie_ep_clkreq_default', 'pcie_ep_perst_default', 'pcie_ep_wake_default' do not match any of the regexes: '-pins$', 'pinctrl-[0-9]+' > > This method also unifies the bindings with other Qualcomm TLMM and LPASS > pinctrl bindings. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > Reviewed-by: Bjorn Andersson <andersson@kernel.org> > --- > .../bindings/pinctrl/qcom,sdx55-pinctrl.yaml | 14 +++++++++++--- > 1 file changed, 11 insertions(+), 3 deletions(-) > Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml index a38090b14aab..fff57abf4fbc 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml @@ -45,9 +45,17 @@ properties: gpio-reserved-ranges: maxItems: 1 -#PIN CONFIGURATION NODES patternProperties: - '-pins$': + "-state$": + oneOf: + - $ref: "#/$defs/qcom-sdx55-tlmm-state" + - patternProperties: + "-pins$": + $ref: "#/$defs/qcom-sdx55-tlmm-state" + additionalProperties: false + +$defs: + qcom-sdx55-tlmm-state: type: object description: Pinctrl node's client devices use subnodes for desired pin configuration. @@ -146,7 +154,7 @@ examples: #interrupt-cells = <2>; interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>; - serial-pins { + serial-state { pins = "gpio8", "gpio9"; function = "blsp_uart3"; drive-strength = <8>;