| Message ID | 20220926190322.2889342-3-sean.anderson@seco.com |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | net: dpaa: Convert to phylink | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/patch-applied | success | |
| robh/dtbs-check | warning | build log |
| robh/dt-meta-schema | success | |
| robh/checkpatch | success | |
| robh/patch-applied | success | |
| robh/dtbs-check | warning | build log |
| robh/dt-meta-schema | success |
On Mon, 26 Sep 2022 15:03:14 -0400, Sean Anderson wrote: > This binding is fairly bare-bones for now, since the Lynx driver doesn't > parse any properties (or match based on the compatible). We just need it > in order to prevent the PCS nodes from having phy devices attached to > them. This is not really a problem, but it is a bit inefficient. > > This binding is really for three separate PCSs (SGMII, QSGMII, and XFI). > However, the driver treats all of them the same. This works because the > SGMII and XFI devices typically use the same address, and the SerDes > driver (or RCW) muxes between them. The QSGMII PCSs have the same > register layout as the SGMII PCSs. To do things properly, we'd probably > do something like > > ethernet-pcs@0 { > #pcs-cells = <1>; > compatible = "fsl,lynx-pcs"; > reg = <0>, <1>, <2>, <3>; > }; > > but that would add complexity, and we can describe the hardware just > fine using separate PCSs for now. > > Signed-off-by: Sean Anderson <sean.anderson@seco.com> > --- > > Changes in v5: > - New > > .../bindings/net/pcs/fsl,lynx-pcs.yaml | 40 +++++++++++++++++++ > 1 file changed, 40 insertions(+) > create mode 100644 Documentation/devicetree/bindings/net/pcs/fsl,lynx-pcs.yaml > Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/net/pcs/fsl,lynx-pcs.yaml b/Documentation/devicetree/bindings/net/pcs/fsl,lynx-pcs.yaml new file mode 100644 index 000000000000..fbedf696c555 --- /dev/null +++ b/Documentation/devicetree/bindings/net/pcs/fsl,lynx-pcs.yaml @@ -0,0 +1,40 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/pcs/fsl,lynx-pcs.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP Lynx PCS + +maintainers: + - Ioana Ciornei <ioana.ciornei@nxp.com> + +description: | + NXP Lynx 10G and 28G SerDes have Ethernet PCS devices which can be used as + protocol controllers. They are accessible over the Ethernet interface's MDIO + bus. + +properties: + compatible: + const: fsl,lynx-pcs + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + mdio-bus { + #address-cells = <1>; + #size-cells = <0>; + + qsgmii_pcs1: ethernet-pcs@1 { + compatible = "fsl,lynx-pcs"; + reg = <1>; + }; + };
This binding is fairly bare-bones for now, since the Lynx driver doesn't parse any properties (or match based on the compatible). We just need it in order to prevent the PCS nodes from having phy devices attached to them. This is not really a problem, but it is a bit inefficient. This binding is really for three separate PCSs (SGMII, QSGMII, and XFI). However, the driver treats all of them the same. This works because the SGMII and XFI devices typically use the same address, and the SerDes driver (or RCW) muxes between them. The QSGMII PCSs have the same register layout as the SGMII PCSs. To do things properly, we'd probably do something like ethernet-pcs@0 { #pcs-cells = <1>; compatible = "fsl,lynx-pcs"; reg = <0>, <1>, <2>, <3>; }; but that would add complexity, and we can describe the hardware just fine using separate PCSs for now. Signed-off-by: Sean Anderson <sean.anderson@seco.com> --- Changes in v5: - New .../bindings/net/pcs/fsl,lynx-pcs.yaml | 40 +++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/pcs/fsl,lynx-pcs.yaml