From patchwork Sat Sep 24 12:36:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 1681892 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=oeARh4S6; dkim-atps=neutral Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4MZT6c1cfvz1yqV for ; Sat, 24 Sep 2022 22:36:56 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230451AbiIXMgy (ORCPT ); Sat, 24 Sep 2022 08:36:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45608 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233247AbiIXMg0 (ORCPT ); Sat, 24 Sep 2022 08:36:26 -0400 Received: from mail-lf1-x135.google.com (mail-lf1-x135.google.com [IPv6:2a00:1450:4864:20::135]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 135E7EFA48 for ; Sat, 24 Sep 2022 05:36:21 -0700 (PDT) Received: by mail-lf1-x135.google.com with SMTP id j16so4172356lfg.1 for ; Sat, 24 Sep 2022 05:36:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=rCN+9UxHevXQjd1NCATacdP2s68Cb7XxV53oQeDsNIw=; b=oeARh4S63Fe4ufMV+ilAyKNRCQBArRFoadyJEpuZLL3CgXCxrP4S6JgiVS12qe9RvQ C+kjTJE+Km4E2J61YAu9dqL+4IY8rX/MMzfW+1CygO/VbgMSieVyKbViBJvtFp51Mauc HCMg89RF/TuDsfkgAB1IQm87dR5ncmv56G/zH+kN9xVgz0S2sorC96o/ZfTmXeZciQFA 170wS+9/BLWLl5Tue5Zv8PBqmxRBT9LHJJ3+l/pT+x1EdH1Ph9LwIU4LkRLKVjVX9/EI HXJOySeeQy7WoKdB6g1uyhX9Q9X63kg9xh0o1nmF20QXjQ+gVhMod25u/1Se4IMbcivV Ge0w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=rCN+9UxHevXQjd1NCATacdP2s68Cb7XxV53oQeDsNIw=; b=YT4be5v7MAfO2oYIL1S+um8r6pqD8Cl+MMIlHmdG8flCrt8xfpMKupGBt1dQJj41UH W/EOIp8JsfWBrDPll9fR91SVpxlNfz+EpZWv15+2stiF3VvnumndwGXpAMhoX7YPG4ti rhGG/yErwf2Eg3syMnUqk0ZTA+qIByjCwWioXHB1hG1/yeGI26QBnWFbuZw/+H2Mp2x9 BoRt9lIXZtGwiaHToipPA5QCiGPo31KzR8p1ISVBwWQkUVFrT5NeF6D/HGZD7O1FzR1g 1wEEZN4RfnrODb/zlrI64PNvguUdye4DXVaWnaP3yenReNY28tA7RWN9bSNv2bgE0AKl l3PQ== X-Gm-Message-State: ACrzQf1K87qOmtjowGFbVbFIc77qxsgXLTXdfP61e/bhdj3rb1JrpkeS w17A7vAswm3pC3MxWIu+lAFFHg== X-Google-Smtp-Source: AMsMyM4mbaVKxGxbbsWTTaUFdN4g/AMbyxUpA5zp7NXVNs+tVb6ajfiRCo1AfZzgeWSxrIMrfvYOBQ== X-Received: by 2002:a19:5505:0:b0:497:ad71:39f4 with SMTP id n5-20020a195505000000b00497ad7139f4mr5082225lfe.226.1664022980189; Sat, 24 Sep 2022 05:36:20 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id u18-20020a2eb812000000b0026c4113c160sm1707269ljo.109.2022.09.24.05.36.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 24 Sep 2022 05:36:19 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Clark , Sean Paul , Abhinav Kumar , Rob Herring , Krzysztof Kozlowski Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v8 09/12] dt-bindings: display/msm: split dpu-msm8998 into DPU and MDSS parts Date: Sat, 24 Sep 2022 15:36:08 +0300 Message-Id: <20220924123611.225520-10-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220924123611.225520-1-dmitry.baryshkov@linaro.org> References: <20220924123611.225520-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org In order to make the schema more readable, split dpu-msm8998 into the DPU and MDSS parts, each one describing just a single device binding. Signed-off-by: Dmitry Baryshkov Reviewed-by: Rob Herring --- .../display/msm/qcom,msm8998-dpu.yaml | 95 +++++++++++++++++++ ...pu-msm8998.yaml => qcom,msm8998-mdss.yaml} | 47 ++------- 2 files changed, 101 insertions(+), 41 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,msm8998-dpu.yaml rename Documentation/devicetree/bindings/display/msm/{dpu-msm8998.yaml => qcom,msm8998-mdss.yaml} (69%) diff --git a/Documentation/devicetree/bindings/display/msm/qcom,msm8998-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,msm8998-dpu.yaml new file mode 100644 index 000000000000..b02adba36e9e --- /dev/null +++ b/Documentation/devicetree/bindings/display/msm/qcom,msm8998-dpu.yaml @@ -0,0 +1,95 @@ +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/msm/qcom,msm8998-dpu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Display DPU dt properties for MSM8998 target + +maintainers: + - AngeloGioacchino Del Regno + +$ref: /schemas/display/msm/dpu-common.yaml# + +properties: + compatible: + items: + - const: qcom,msm8998-dpu + + reg: + items: + - description: Address offset and size for mdp register set + - description: Address offset and size for regdma register set + - description: Address offset and size for vbif register set + - description: Address offset and size for non-realtime vbif register set + + reg-names: + items: + - const: mdp + - const: regdma + - const: vbif + - const: vbif_nrt + + clocks: + items: + - description: Display ahb clock + - description: Display axi clock + - description: Display mem-noc clock + - description: Display core clock + - description: Display vsync clock + + clock-names: + items: + - const: iface + - const: bus + - const: mnoc + - const: core + - const: vsync + +unevaluatedProperties: false + +examples: + - | + #include + #include + + display-controller@c901000 { + compatible = "qcom,msm8998-dpu"; + reg = <0x0c901000 0x8f000>, + <0x0c9a8e00 0xf0>, + <0x0c9b0000 0x2008>, + <0x0c9b8000 0x1040>; + reg-names = "mdp", "regdma", "vbif", "vbif_nrt"; + + clocks = <&mmcc MDSS_AHB_CLK>, + <&mmcc MDSS_AXI_CLK>, + <&mmcc MNOC_AHB_CLK>, + <&mmcc MDSS_MDP_CLK>, + <&mmcc MDSS_VSYNC_CLK>; + clock-names = "iface", "bus", "mnoc", "core", "vsync"; + + interrupt-parent = <&mdss>; + interrupts = <0>; + operating-points-v2 = <&mdp_opp_table>; + power-domains = <&rpmpd MSM8998_VDDMX>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + endpoint { + remote-endpoint = <&dsi0_in>; + }; + }; + + port@1 { + reg = <1>; + endpoint { + remote-endpoint = <&dsi1_in>; + }; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml b/Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml similarity index 69% rename from Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml rename to Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml index 67791dbc3b5d..192a832ef808 100644 --- a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml @@ -1,18 +1,18 @@ # SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause %YAML 1.2 --- -$id: http://devicetree.org/schemas/display/msm/dpu-msm8998.yaml# +$id: http://devicetree.org/schemas/display/msm/qcom,msm8998-mdss.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Qualcomm Display DPU dt properties for MSM8998 target +title: Qualcomm MSM8998 Display MDSS maintainers: - AngeloGioacchino Del Regno -description: | +description: Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree - bindings of MDSS and DPU are mentioned for MSM8998 target. + bindings of MDSS are mentioned for MSM8998 target. $ref: /schemas/display/msm/mdss-common.yaml# @@ -39,44 +39,9 @@ properties: patternProperties: "^display-controller@[0-9a-f]+$": type: object - $ref: /schemas/display/msm/dpu-common.yaml# - description: Node containing the properties of DPU. - unevaluatedProperties: false - properties: compatible: - items: - - const: qcom,msm8998-dpu - - reg: - items: - - description: Address offset and size for mdp register set - - description: Address offset and size for regdma register set - - description: Address offset and size for vbif register set - - description: Address offset and size for non-realtime vbif register set - - reg-names: - items: - - const: mdp - - const: regdma - - const: vbif - - const: vbif_nrt - - clocks: - items: - - description: Display ahb clock - - description: Display axi clock - - description: Display mem-noc clock - - description: Display core clock - - description: Display vsync clock - - clock-names: - items: - - const: iface - - const: bus - - const: mnoc - - const: core - - const: vsync + const: qcom,msm8998-dpu unevaluatedProperties: false @@ -86,7 +51,7 @@ examples: #include #include - mdss: display-subsystem@c900000 { + display-subsystem@c900000 { compatible = "qcom,msm8998-mdss"; reg = <0x0c900000 0x1000>; reg-names = "mdss";