From patchwork Fri Sep 16 11:26:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 1678633 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=microchip.com header.i=@microchip.com header.a=rsa-sha256 header.s=mchp header.b=QFKypbWm; dkim-atps=neutral Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4MTWy157fmz1yp0 for ; Fri, 16 Sep 2022 21:27:21 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229471AbiIPL1T (ORCPT ); Fri, 16 Sep 2022 07:27:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56030 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230146AbiIPL1S (ORCPT ); Fri, 16 Sep 2022 07:27:18 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DEC609E0FD; Fri, 16 Sep 2022 04:27:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1663327638; x=1694863638; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=jmjzFPLTzirPRRdjytSXcGvB/NkyTEAOoOOffWQqE6s=; b=QFKypbWmvdtMY7sRvkd7C6jXnm/GB/YTMCO5YMkayrYUVxQyBm9GuCr+ GGEA34DFQyD/wuoy/U4wlTIiy54aetsXVUwrnJFbWoaM1nNjofmtkVKgJ VvYwAHWicrgy7uqtiqkKV2+gkwkbPfma531nshNxFcI4CX+Tj67+wz53N kYF7NBRw6uF9hFeNzMY0rKq1RT4/ug0Vwef7aeqXO4AQzJ/S79nafw/fc oQbjwSD8GAbpI7YsWzmiNV5GlZquVUrZFtqi/gmK0Ow9LAXvYdDtuQiRE uTuEa5YcXOiODclZ62gQ1vap77mMnUfAx2pX0V4gC07c7E74PN7DyKwtd w==; X-IronPort-AV: E=Sophos;i="5.93,320,1654585200"; d="scan'208";a="174187630" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 16 Sep 2022 04:27:17 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Fri, 16 Sep 2022 04:27:16 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Fri, 16 Sep 2022 04:27:13 -0700 From: Conor Dooley To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Daire McNamara , Shravan Chippa CC: Paul Walmsley , Palmer Dabbelt , Albert Ou , Cyril Jean , Lewis Hanly , Vattipalli Praveen , Wolfgang Grandegger , Hugh Breslin , , , , Krzysztof Kozlowski Subject: [PATCH v5 01/10] dt-bindings: riscv: microchip: document icicle reference design Date: Fri, 16 Sep 2022 12:26:37 +0100 Message-ID: <20220916112645.567794-2-conor.dooley@microchip.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220916112645.567794-1-conor.dooley@microchip.com> References: <20220916112645.567794-1-conor.dooley@microchip.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The icicle kit reference design's v2022.09 release,made some changes to the memory map - including adding the ability to read the fabric clock controllers via the system controller bus & making the PCI controller work with upstream Linux. While the PCI was not working in the v2022.03 design, so nothing is broken there in terms of backwards compatibility, the fabric clocks used in the v2022.03 design were chosen by the individual run of the synthesis tool. In the v2022.09 reference design, the clocks are fixed to use the "north west" fabric Clock Conditioning Circuitry. Make use of a new compatible to denote that this is not backwards compatible. Acked-by: Krzysztof Kozlowski Signed-off-by: Conor Dooley --- .../devicetree/bindings/riscv/microchip.yaml | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/riscv/microchip.yaml b/Documentation/devicetree/bindings/riscv/microchip.yaml index 1aa7336a9672..485981fbfb4b 100644 --- a/Documentation/devicetree/bindings/riscv/microchip.yaml +++ b/Documentation/devicetree/bindings/riscv/microchip.yaml @@ -17,12 +17,18 @@ properties: $nodename: const: '/' compatible: - items: - - enum: - - microchip,mpfs-icicle-kit - - microchip,mpfs-icicle-reference-rtlv2203 - - sundance,polarberry - - const: microchip,mpfs + oneOf: + - items: + - enum: + - microchip,mpfs-icicle-reference-rtlv2203 + - microchip,mpfs-icicle-reference-rtlv2209 + - const: microchip,mpfs-icicle-kit + - const: microchip,mpfs + + - items: + - enum: + - sundance,polarberry + - const: microchip,mpfs additionalProperties: true