diff mbox series

[09/43] dt-bindings: phy: qcom,msm8996-qmp-pcie: add example node

Message ID 20220705094239.17174-10-johan+linaro@kernel.org
State Changes Requested, archived
Headers show
Series phy: qcom,qmp: fix dt-bindings and deprecate lane suffix | expand

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Commit Message

Johan Hovold July 5, 2022, 9:42 a.m. UTC
Add an example node based on a cleaned up version of msm8996.dtsi.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
---
 .../phy/qcom,msm8996-qmp-pcie-phy.yaml        | 72 +++++++++++++++++++
 1 file changed, 72 insertions(+)

Comments

Krzysztof Kozlowski July 5, 2022, 10:10 a.m. UTC | #1
On 05/07/2022 11:42, Johan Hovold wrote:
> Add an example node based on a cleaned up version of msm8996.dtsi.
> 
> Signed-off-by: Johan Hovold <johan+linaro@kernel.org>

Squash it, please.

Best regards,
Krzysztof
Johan Hovold July 5, 2022, 10:22 a.m. UTC | #2
On Tue, Jul 05, 2022 at 12:10:29PM +0200, Krzysztof Kozlowski wrote:
> On 05/07/2022 11:42, Johan Hovold wrote:
> > Add an example node based on a cleaned up version of msm8996.dtsi.
> > 
> > Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
> 
> Squash it, please.

Why? It's a new addition to the schema.

Johan
Krzysztof Kozlowski July 5, 2022, 11:32 a.m. UTC | #3
On 05/07/2022 12:22, Johan Hovold wrote:
> On Tue, Jul 05, 2022 at 12:10:29PM +0200, Krzysztof Kozlowski wrote:
>> On 05/07/2022 11:42, Johan Hovold wrote:
>>> Add an example node based on a cleaned up version of msm8996.dtsi.
>>>
>>> Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
>>
>> Squash it, please.
> 
> Why? It's a new addition to the schema.

Because it is not really new. When you add new bindings or convert
existing ones (without example), it is expected that example is within
that commit. You do here the same - add entirely new file. Old file had
example and the bindings. You now split some pieces, convert it, so new
file is also expected to come with the bindings.

The same as there is no point to make half-TXT-YAML conversion, there is
no point in half-split of existing bindings. Either this split is
correct and complete, or it's not a finished commit and we do not commit
half-commits.

Best regards,
Krzysztof
Johan Hovold July 5, 2022, noon UTC | #4
On Tue, Jul 05, 2022 at 01:32:30PM +0200, Krzysztof Kozlowski wrote:
> On 05/07/2022 12:22, Johan Hovold wrote:
> > On Tue, Jul 05, 2022 at 12:10:29PM +0200, Krzysztof Kozlowski wrote:
> >> On 05/07/2022 11:42, Johan Hovold wrote:
> >>> Add an example node based on a cleaned up version of msm8996.dtsi.
> >>>
> >>> Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
> >>
> >> Squash it, please.
> > 
> > Why? It's a new addition to the schema.
> 
> Because it is not really new. When you add new bindings or convert
> existing ones (without example), it is expected that example is within
> that commit. You do here the same - add entirely new file. Old file had
> example and the bindings. You now split some pieces, convert it, so new
> file is also expected to come with the bindings.
> 
> The same as there is no point to make half-TXT-YAML conversion, there is
> no point in half-split of existing bindings. Either this split is
> correct and complete, or it's not a finished commit and we do not commit
> half-commits.

Fair enough, I'll squash the examples in.

Thanks for the quick review.

Johan
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-pcie-phy.yaml
index 8aadb25686b2..45f7bb7a632a 100644
--- a/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-pcie-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-pcie-phy.yaml
@@ -130,3 +130,75 @@  required:
   - vdda-pll-supply
 
 additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/qcom,gcc-msm8996.h>
+    pcie_phy: phy-wrapper@34000 {
+        compatible = "qcom,msm8996-qmp-pcie-phy";
+        reg = <0x34000 0x488>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+        ranges = <0x0 0x34000 0x4000>;
+
+        clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>,
+                 <&gcc GCC_PCIE_PHY_CFG_AHB_CLK>,
+                 <&gcc GCC_PCIE_CLKREF_CLK>;
+        clock-names = "aux", "cfg_ahb", "ref";
+
+        resets = <&gcc GCC_PCIE_PHY_BCR>,
+                 <&gcc GCC_PCIE_PHY_COM_BCR>,
+                 <&gcc GCC_PCIE_PHY_COM_NOCSR_BCR>;
+        reset-names = "phy", "common", "cfg";
+
+        vdda-phy-supply = <&vreg_l28a_0p925>;
+        vdda-pll-supply = <&vreg_l12a_1p8>;
+
+        pciephy_0: phy@1000 {
+            reg = <0x1000 0x130>,
+                  <0x1200 0x200>,
+                  <0x1400 0x1dc>;
+
+            clocks = <&gcc GCC_PCIE_0_PIPE_CLK>;
+            clock-names = "pipe0";
+            resets = <&gcc GCC_PCIE_0_PHY_BCR>;
+            reset-names = "lane0";
+
+            #clock-cells = <0>;
+            clock-output-names = "pcie_0_pipe_clk_src";
+
+            #phy-cells = <0>;
+        };
+
+        pciephy_1: phy@2000 {
+            reg = <0x2000 0x130>,
+                  <0x2200 0x200>,
+                  <0x2400 0x1dc>;
+
+            clocks = <&gcc GCC_PCIE_1_PIPE_CLK>;
+            clock-names = "pipe1";
+            resets = <&gcc GCC_PCIE_1_PHY_BCR>;
+            reset-names = "lane1";
+
+            #clock-cells = <0>;
+            clock-output-names = "pcie_1_pipe_clk_src";
+
+            #phy-cells = <0>;
+        };
+
+        pciephy_2: phy@3000 {
+            reg = <0x3000 0x130>,
+                  <0x3200 0x200>,
+                  <0x3400 0x1dc>;
+
+            clocks = <&gcc GCC_PCIE_2_PIPE_CLK>;
+            clock-names = "pipe2";
+            resets = <&gcc GCC_PCIE_2_PHY_BCR>;
+            reset-names = "lane2";
+
+            #clock-cells = <0>;
+            clock-output-names = "pcie_2_pipe_clk_src";
+
+            #phy-cells = <0>;
+        };
+    };