diff mbox series

[9/9] dt-bindings: pci: toshiba,visconti-pcie: Update the common clock properties

Message ID 20220510015229.139818-10-nobuhiro1.iwamatsu@toshiba.co.jp
State Not Applicable, archived
Headers show
Series Visconti5: Update the clock providers | expand

Checks

Context Check Description
robh/checkpatch warning total: 0 errors, 1 warnings, 15 lines checked
robh/patch-applied success
robh/dtbs-check warning build log
robh/dt-meta-schema success

Commit Message

Nobuhiro Iwamatsu May 10, 2022, 1:52 a.m. UTC
The clock for this driver switched to the common clock controller driver.
Therefore, update common clock properties for PCIe controller in the binding
document.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
---
 .../devicetree/bindings/pci/toshiba,visconti-pcie.yaml         | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Comments

Rob Herring (Arm) May 17, 2022, 8:50 p.m. UTC | #1
On Tue, 10 May 2022 10:52:29 +0900, Nobuhiro Iwamatsu wrote:
> The clock for this driver switched to the common clock controller driver.
> Therefore, update common clock properties for PCIe controller in the binding
> document.
> 
> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
> ---
>  .../devicetree/bindings/pci/toshiba,visconti-pcie.yaml         | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 

Acked-by: Rob Herring <robh@kernel.org>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.yaml b/Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.yaml
index 30b6396d83c8..b9d0484606cc 100644
--- a/Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.yaml
@@ -69,6 +69,7 @@  unevaluatedProperties: false
 
 examples:
   - |
+    #include <dt-bindings/clock/toshiba,tmpv770x.h>
     #include <dt-bindings/interrupt-controller/irq.h>
     #include <dt-bindings/interrupt-controller/arm-gic.h>
 
@@ -102,7 +103,7 @@  examples:
                  0 0 0 2 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH
                  0 0 0 3 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH
                  0 0 0 4 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
-            clocks = <&extclk100mhz>, <&clk600mhz>, <&clk25mhz>;
+            clocks = <&extclk100mhz>, <&pismu TMPV770X_CLK_PCIE_MSTR>, <&pismu TMPV770X_CLK_PCIE_AUX>;
             clock-names = "ref", "core", "aux";
             max-link-speed = <2>;
         };