| Message ID | 20220309194521.7028-2-biju.das.jz@bp.renesas.com |
|---|---|
| State | Changes Requested, archived |
| Headers | show |
| Series | [1/3] media: dt-bindings: media: renesas,vsp1: Document RZ/{G2L,V2L} VSPD bindings | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/dtbs-check | success | |
| robh/dt-meta-schema | success | |
| robh/patch-applied | success |
Hi Biju, On Wed, Mar 9, 2022 at 8:45 PM Biju Das <biju.das.jz@bp.renesas.com> wrote: > Document VSPD found in RZ/G2L and RZ/V2L family SoC's. VSPD block is > similar to VSP2-D found on R-Car SoC's, but it does not have a version > register and it has 3 clocks compared to 1 clock on vsp1 and vsp2. > > This patch introduces a new compatible 'renesas,vsp2-rzg2l' to handle > these differences. > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Thanks for your patch! > --- a/Documentation/devicetree/bindings/media/renesas,vsp1.yaml > +++ b/Documentation/devicetree/bindings/media/renesas,vsp1.yaml > @@ -19,6 +19,7 @@ properties: > enum: > - renesas,vsp1 # R-Car Gen2 and RZ/G1 > - renesas,vsp2 # R-Car Gen3 and RZ/G2 > + - renesas,vsp2-rzg2l # RZ/G2L and RZ/V2L Please follow the recommended order <vendor>,[<family>|<soc>-]<function>, i.e. "renesas,rzg2l-vsp2". Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
Hi Geert, Thanks for the feedback. > Subject: Re: [PATCH 1/3] media: dt-bindings: media: renesas,vsp1: Document > RZ/{G2L,V2L} VSPD bindings > > Hi Biju, > > On Wed, Mar 9, 2022 at 8:45 PM Biju Das <biju.das.jz@bp.renesas.com> > wrote: > > Document VSPD found in RZ/G2L and RZ/V2L family SoC's. VSPD block is > > similar to VSP2-D found on R-Car SoC's, but it does not have a version > > register and it has 3 clocks compared to 1 clock on vsp1 and vsp2. > > > > This patch introduces a new compatible 'renesas,vsp2-rzg2l' to handle > > these differences. > > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Thanks for your patch! > > > --- a/Documentation/devicetree/bindings/media/renesas,vsp1.yaml > > +++ b/Documentation/devicetree/bindings/media/renesas,vsp1.yaml > > @@ -19,6 +19,7 @@ properties: > > enum: > > - renesas,vsp1 # R-Car Gen2 and RZ/G1 > > - renesas,vsp2 # R-Car Gen3 and RZ/G2 > > + - renesas,vsp2-rzg2l # RZ/G2L and RZ/V2L > > Please follow the recommended order <vendor>,[<family>|<soc>-]<function>, > i.e. "renesas,rzg2l-vsp2". Agreed. Will send v2 with this changes. Cheers, Biju
diff --git a/Documentation/devicetree/bindings/media/renesas,vsp1.yaml b/Documentation/devicetree/bindings/media/renesas,vsp1.yaml index 990e9c1dbc43..52e26eea4f70 100644 --- a/Documentation/devicetree/bindings/media/renesas,vsp1.yaml +++ b/Documentation/devicetree/bindings/media/renesas,vsp1.yaml @@ -19,6 +19,7 @@ properties: enum: - renesas,vsp1 # R-Car Gen2 and RZ/G1 - renesas,vsp2 # R-Car Gen3 and RZ/G2 + - renesas,vsp2-rzg2l # RZ/G2L and RZ/V2L reg: maxItems: 1 @@ -26,8 +27,8 @@ properties: interrupts: maxItems: 1 - clocks: - maxItems: 1 + clocks: true + clock-names: true power-domains: maxItems: 1 @@ -50,17 +51,42 @@ required: additionalProperties: false -if: - properties: - compatible: - items: - - const: renesas,vsp1 -then: - properties: - renesas,fcp: false -else: - required: - - renesas,fcp +allOf: + - if: + properties: + compatible: + contains: + const: renesas,vsp1 + then: + properties: + renesas,fcp: false + else: + required: + - renesas,fcp + + - if: + properties: + compatible: + contains: + const: renesas,vsp2-rzg2l + then: + properties: + clocks: + items: + - description: LCDC Main clock + - description: LCDC Register Access Clock + - description: LCDC Video Clock + clock-names: + items: + - const: du.0 + - const: pclk + - const: vclk + required: + - clock-names + else: + properties: + clocks: + maxItems: 1 examples: # R8A7790 (R-Car H2) VSP1-S