Message ID | 20211124184541.745827-1-festevam@gmail.com |
---|---|
State | Not Applicable, archived |
Headers | show |
Series | [v2] ARM: dts: imx6ull-pinfunc: Fix CSI_DATA07__ESAI_TX0 pad name | expand |
Context | Check | Description |
---|---|---|
robh/checkpatch | warning | total: 1 errors, 1 warnings, 7 lines checked |
On Wed, 24 Nov 2021 15:45:41 -0300, Fabio Estevam wrote: > According to the i.MX6ULL Reference Manual, pad CSI_DATA07 may > have the ESAI_TX0 functionality, not ESAI_T0. > > Also, NXP's i.MX Config Tools 10.0 generates dtsi with the > MX6ULL_PAD_CSI_DATA07__ESAI_TX0 naming, so fix it accordingly. > > There are no devicetree users in mainline that use the old name, > so just remove the old entry. > > Fixes: c201369d4aa5 ("ARM: dts: imx6ull: add imx6ull support") > Reported-by: George Makarov <georgemakarov1@gmail.com> > Signed-off-by: Fabio Estevam <festevam@gmail.com> > --- > Changes since v1: > - Remove the old name (Shawn, Otavio) > > arch/arm/boot/dts/imx6ull-pinfunc.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Acked-by: Rob Herring <robh@kernel.org>
On Wed, Nov 24, 2021 at 03:45:41PM -0300, Fabio Estevam wrote: > According to the i.MX6ULL Reference Manual, pad CSI_DATA07 may > have the ESAI_TX0 functionality, not ESAI_T0. > > Also, NXP's i.MX Config Tools 10.0 generates dtsi with the > MX6ULL_PAD_CSI_DATA07__ESAI_TX0 naming, so fix it accordingly. > > There are no devicetree users in mainline that use the old name, > so just remove the old entry. > > Fixes: c201369d4aa5 ("ARM: dts: imx6ull: add imx6ull support") > Reported-by: George Makarov <georgemakarov1@gmail.com> > Signed-off-by: Fabio Estevam <festevam@gmail.com> Applied, thanks!
diff --git a/arch/arm/boot/dts/imx6ull-pinfunc.h b/arch/arm/boot/dts/imx6ull-pinfunc.h index eb025a9d4759..7328d4ef8559 100644 --- a/arch/arm/boot/dts/imx6ull-pinfunc.h +++ b/arch/arm/boot/dts/imx6ull-pinfunc.h @@ -82,6 +82,6 @@ #define MX6ULL_PAD_CSI_DATA04__ESAI_TX_FS 0x01F4 0x0480 0x0000 0x9 0x0 #define MX6ULL_PAD_CSI_DATA05__ESAI_TX_CLK 0x01F8 0x0484 0x0000 0x9 0x0 #define MX6ULL_PAD_CSI_DATA06__ESAI_TX5_RX0 0x01FC 0x0488 0x0000 0x9 0x0 -#define MX6ULL_PAD_CSI_DATA07__ESAI_T0 0x0200 0x048C 0x0000 0x9 0x0 +#define MX6ULL_PAD_CSI_DATA07__ESAI_TX0 0x0200 0x048C 0x0000 0x9 0x0 #endif /* __DTS_IMX6ULL_PINFUNC_H */
According to the i.MX6ULL Reference Manual, pad CSI_DATA07 may have the ESAI_TX0 functionality, not ESAI_T0. Also, NXP's i.MX Config Tools 10.0 generates dtsi with the MX6ULL_PAD_CSI_DATA07__ESAI_TX0 naming, so fix it accordingly. There are no devicetree users in mainline that use the old name, so just remove the old entry. Fixes: c201369d4aa5 ("ARM: dts: imx6ull: add imx6ull support") Reported-by: George Makarov <georgemakarov1@gmail.com> Signed-off-by: Fabio Estevam <festevam@gmail.com> --- Changes since v1: - Remove the old name (Shawn, Otavio) arch/arm/boot/dts/imx6ull-pinfunc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)