From patchwork Wed Oct 20 08:49:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 1543763 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=denx.de header.i=@denx.de header.a=rsa-sha256 header.s=phobos-20191101 header.b=PrinXZrn; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by bilbo.ozlabs.org (Postfix) with ESMTP id 4HZ47q09m7z9sR4 for ; Wed, 20 Oct 2021 19:50:31 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229910AbhJTIwn (ORCPT ); Wed, 20 Oct 2021 04:52:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57938 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229663AbhJTIwm (ORCPT ); Wed, 20 Oct 2021 04:52:42 -0400 Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8E895C06161C; Wed, 20 Oct 2021 01:50:28 -0700 (PDT) Received: from tr.lan (ip-89-176-112-137.net.upcbroadband.cz [89.176.112.137]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: marex@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id B312A82F9E; Wed, 20 Oct 2021 10:50:25 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1634719826; bh=HzN4VwCev1h0HKzqcm7IiINVPE1vhUzyaNSEfQ58SfA=; h=From:To:Cc:Subject:Date:From; b=PrinXZrndEL6CTZt/2hVmn3+J/TjvbJv8zhu0Wu8HX8fwmvmgb7wko8lpC8Ps8bja 3IqbVqYjHaAnj1pSjdVXFO+riuOgU6CzNgVtXoSP52Tx9BBGQg7Myd8XHnDNczZ3qI WeEYlFvIVFkGc0uh+XzmLZ8Xy2EsMiIYz4a0QHGtNZn5V7F3sMkKh1BbSe8/HQVjvY azq8+oRnFG8FQ3335H93Md8uNRaa7PUXA1LPAiphyGHqM4wNWV+Vnp8BDDLOVihgcj E2VRHXe4YQtWnFvLlSzuZHfQWLF0uMLT8AVXF9KUW3VAZQ7Dq7D2SqdOzR7Bfi6J8s au4FoU2tmTZPg== From: Marek Vasut To: linux-clk@vger.kernel.org Cc: Marek Vasut , Matti Vaittinen , Michael Turquette , Rob Herring , Stephen Boyd , devicetree@vger.kernel.org, linux-power@fi.rohmeurope.com Subject: [PATCH 1/2] dt-bindings: mfd: rohm,bd71847-pmic: Document rohm,clock-output-is-critical property Date: Wed, 20 Oct 2021 10:49:55 +0200 Message-Id: <20211020084956.83041-1-marex@denx.de> X-Mailer: git-send-email 2.33.0 MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the possibility to configure PMIC 32kHz output clock as CRITICAL, so that they are never gated off. This is useful in case those clock supply some vital clock net, which requires the clock to always run. The iMX8M RTC XTAL input is one such example, if the clock are ever gated off, the system locks up completely. The clock must be present and enabled even if the RTC is unused. Signed-off-by: Marek Vasut Cc: Matti Vaittinen Cc: Michael Turquette Cc: Rob Herring Cc: Stephen Boyd Cc: devicetree@vger.kernel.org Cc: linux-power@fi.rohmeurope.com To: linux-clk@vger.kernel.org --- Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml index 5d531051a153..2497ade2bbd0 100644 --- a/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml +++ b/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml @@ -41,6 +41,11 @@ properties: clock-output-names: maxItems: 1 + rohm,clock-output-is-critical: + description: + Never gate off C32K_OUT clock. + type: boolean + # The BD71847 abd BD71850 support two different HW states as reset target # states. States are called as SNVS and READY. At READY state all the PMIC # power outputs go down and OTP is reload. At the SNVS state all other logic