| Message ID | 20211013105541.68045-9-bhupesh.sharma@linaro.org |
|---|---|
| State | Changes Requested, archived |
| Headers | show |
| Series | Enable Qualcomm Crypto Engine on sm8250 | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/dt-meta-schema | success | |
| robh/dtbs-check | success |
On Wed, Oct 13, 2021 at 04:25:29PM +0530, Bhupesh Sharma wrote: > Add 'interconnects' and 'interconnect-names' as optional properties > to the device-tree binding documentation for qcom crypto IP. > > These properties describe the interconnect path between crypto and main > memory and the interconnect type respectively. And why are 'clocks' now optional? Seems like it should be 2 patches given the long subject with a conjunction. > > Cc: Thara Gopinath <thara.gopinath@linaro.org> > Cc: Bjorn Andersson <bjorn.andersson@linaro.org> > Cc: Rob Herring <robh+dt@kernel.org> > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> > --- > Documentation/devicetree/bindings/crypto/qcom-qce.yaml | 10 ++++++++-- > 1 file changed, 8 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml > index b7ae873dc943..954f762090f3 100644 > --- a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml > +++ b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml > @@ -32,6 +32,14 @@ properties: > - const: bus > - const: core > > + interconnects: > + maxItems: 1 > + description: | > + Interconnect path between qce crypto and main memory. > + > + interconnect-names: > + const: memory > + > dmas: > items: > - description: DMA specifiers for tx dma channel. > @@ -45,8 +53,6 @@ properties: > required: > - compatible > - reg > - - clocks > - - clock-names > - dmas > - dma-names > > -- > 2.31.1 > >
diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml index b7ae873dc943..954f762090f3 100644 --- a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml +++ b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml @@ -32,6 +32,14 @@ properties: - const: bus - const: core + interconnects: + maxItems: 1 + description: | + Interconnect path between qce crypto and main memory. + + interconnect-names: + const: memory + dmas: items: - description: DMA specifiers for tx dma channel. @@ -45,8 +53,6 @@ properties: required: - compatible - reg - - clocks - - clock-names - dmas - dma-names
Add 'interconnects' and 'interconnect-names' as optional properties to the device-tree binding documentation for qcom crypto IP. These properties describe the interconnect path between crypto and main memory and the interconnect type respectively. Cc: Thara Gopinath <thara.gopinath@linaro.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> --- Documentation/devicetree/bindings/crypto/qcom-qce.yaml | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-)