| Message ID | 20210920150807.164673-1-krzysztof.kozlowski@canonical.com |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | [v3,1/6] dt-bindings: mmc: cdns: document Microchip MPFS MMC/SDHCI controller | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/dt-meta-schema | success | |
| robh/dtbs-check | success |
On 20/09/2021 16:08, Krzysztof Kozlowski wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > According to bindings, the compatible must include microchip,mpfs. This > fixes dtbs_check warning: > > arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dt.yaml: /: compatible: ['microchip,mpfs-icicle-kit'] is too short > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> > > --- > > Changes since v1: > 1. Use microchip,mpfs for microchip-mpfs.dtsi, suggested by Geert. > --- > arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts | 2 +- > arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts > index 3b04ef17e8da..07f1f3cab686 100644 > --- a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts > +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts > @@ -10,7 +10,7 @@ > > / { > model = "Microchip PolarFire-SoC Icicle Kit"; > - compatible = "microchip,mpfs-icicle-kit"; > + compatible = "microchip,mpfs-icicle-kit", "microchip,mpfs"; > > aliases { > ethernet0 = &emac1; > diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi > index 93730afe6c58..5084b93188f0 100644 > --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi > +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi > @@ -7,7 +7,7 @@ / { > #address-cells = <2>; > #size-cells = <2>; > model = "Microchip MPFS Icicle Kit"; > - compatible = "microchip,mpfs-icicle-kit"; > + compatible = "microchip,mpfs"; > > chosen { > }; > -- > 2.30.2 > Reviewed-by: Conor Dooley<conor.dooley@microchip.com>
On 20/09/2021 16:08, Krzysztof Kozlowski wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > Licensed IP blocks should have their own vendor compatible. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> > > --- > > Changes since v1: > 1. New patch > --- > arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi > index 55d86b078c53..7948c4249de5 100644 > --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi > +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi > @@ -263,7 +263,7 @@ serial3: serial@20104000 { > }; > > mmc: mmc@20008000 { > - compatible = "cdns,sd4hc"; > + compatible = "microchip,mpfs-sd4hc", "cdns,sd4hc"; > reg = <0x0 0x20008000 0x0 0x1000>; > interrupt-parent = <&plic>; > interrupts = <88>; > -- > 2.30.2 > Reviewed-by: Conor Dooley<conor.dooley@microchip.com>
On 20/09/2021 16:08, Krzysztof Kozlowski wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > Devicetree source is a description of hardware and hardware has only one > block @20008000 which can be configured either as eMMC or SDHC. Having > two node for different modes is an obscure, unusual and confusing way to > configure it. Instead the board file is supposed to customize the block > to its needs, e.g. to SDHC mode. > > This fixes dtbs_check warning: > arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dt.yaml: sdhc@20008000: $nodename:0: 'sdhc@20008000' does not match '^mmc(@.*)?$' > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> > > --- > > Changes since v1: > 1. Move also bus-width, suggested by Geert. > --- > .../microchip/microchip-mpfs-icicle-kit.dts | 11 +++++++- > .../boot/dts/microchip/microchip-mpfs.dtsi | 28 +------------------ > 2 files changed, 11 insertions(+), 28 deletions(-) > > diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts > index 07f1f3cab686..fc1e5869df1b 100644 > --- a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts > +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts > @@ -51,8 +51,17 @@ &serial3 { > status = "okay"; > }; > > -&sdcard { > +&mmc { > status = "okay"; > + > + bus-width = <4>; > + disable-wp; > + cap-sd-highspeed; > + card-detect-delay = <200>; > + sd-uhs-sdr12; > + sd-uhs-sdr25; > + sd-uhs-sdr50; > + sd-uhs-sdr104; > }; > > &emac0 { > diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi > index 5084b93188f0..83bc14860960 100644 > --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi > +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi > @@ -262,39 +262,13 @@ serial3: serial@20104000 { > status = "disabled"; > }; > > - emmc: mmc@20008000 { > - compatible = "cdns,sd4hc"; > - reg = <0x0 0x20008000 0x0 0x1000>; > - interrupt-parent = <&plic>; > - interrupts = <88 89>; > - pinctrl-names = "default"; > - clocks = <&clkcfg 6>; > - bus-width = <4>; > - cap-mmc-highspeed; > - mmc-ddr-3_3v; > - max-frequency = <200000000>; > - non-removable; > - no-sd; > - no-sdio; > - voltage-ranges = <3300 3300>; > - status = "disabled"; > - }; > - > - sdcard: sdhc@20008000 { > + mmc: mmc@20008000 { > compatible = "cdns,sd4hc"; > reg = <0x0 0x20008000 0x0 0x1000>; > interrupt-parent = <&plic>; > interrupts = <88>; > pinctrl-names = "default"; > clocks = <&clkcfg 6>; > - bus-width = <4>; > - disable-wp; > - cap-sd-highspeed; > - card-detect-delay = <200>; > - sd-uhs-sdr12; > - sd-uhs-sdr25; > - sd-uhs-sdr50; > - sd-uhs-sdr104; > max-frequency = <200000000>; > status = "disabled"; > }; > -- > 2.30.2 > Hi Krzysztof, Seems I missed most of this series other than the new vendor name in the V1. We have been redoing the device tree for the mpfs/icicle kit partly dye to some changes we made to the design. Previously SD and eMMC were different FPGA designs but now both are in the same design and managed by the bootloader, depending on where it finds the image to boot from. Since then we've just been using the following single entry in the .dtsi: mmc: mmc@20008000 { /* Common node entry for emmc/sd */ compatible = "cdns,sd4hc"; reg = <0x0 0x20008000 0x0 0x1000>; clocks = <&clkcfg CLK_MMC>; interrupt-parent = <&plic>; interrupts = <PLIC_INT_MMC_MAIN PLIC_INT_MMC_WAKEUP>; bus-width = <4>; cap-mmc-highspeed; cap-sd-highspeed; no-1-8-v; disable-wp; max-frequency = <200000000>; status = "disabled"; }; CLK_MMC is 6 & the interrupt numbers are 88 and 89 respectively. Cheers, Conor.
Hi Krzysztof, Thanks for your patch! On Mon, Sep 20, 2021 at 5:09 PM Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> wrote: > The Microchip MPFS Icicle Kit uses Cadence SD/SDIO/eMMC Host Controller Actually it's the SoC .dtsi > without any additional vendor compatible: > > arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dt.yaml: mmc@20008000: compatible:0: 'cdns,sd4hc' is not one of ['socionext,uniphier-sd4hc'] > arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dt.yaml: mmc@20008000: compatible: ['cdns,sd4hc'] is too short > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> With the above fixed: Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Gr{oetje,eeting}s, Geert
On Mon, Sep 20, 2021 at 5:09 PM Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> wrote: > The DTSI file defines soc node and address/size cells, so there is no > point in duplicating it in DTS file. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> (from v1) Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Gr{oetje,eeting}s, Geert
Hi Krzysztof, On Mon, Sep 20, 2021 at 5:09 PM Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> wrote: > According to bindings, the compatible must include microchip,mpfs. This > fixes dtbs_check warning: > > arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dt.yaml: /: compatible: ['microchip,mpfs-icicle-kit'] is too short > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> > --- a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts > +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts > @@ -10,7 +10,7 @@ > > / { > model = "Microchip PolarFire-SoC Icicle Kit"; > - compatible = "microchip,mpfs-icicle-kit"; > + compatible = "microchip,mpfs-icicle-kit", "microchip,mpfs"; > > aliases { > ethernet0 = &emac1; > diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi > index 93730afe6c58..5084b93188f0 100644 > --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi > +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi > @@ -7,7 +7,7 @@ / { > #address-cells = <2>; > #size-cells = <2>; > model = "Microchip MPFS Icicle Kit"; Note that "model" should be "Microchip PolarFire SoC" (with/without a hyphen? seems like the occurrence in microchip-mpfs-icicle-kit.dts is the only one with a hyphen) > - compatible = "microchip,mpfs-icicle-kit"; > + compatible = "microchip,mpfs"; > > chosen { > }; Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
On Mon, Sep 20, 2021 at 5:10 PM Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> wrote: > Licensed IP blocks should have their own vendor compatible. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Gr{oetje,eeting}s, Geert
On 21/09/2021 12:40, Conor.Dooley@microchip.com wrote: > On 20/09/2021 16:08, Krzysztof Kozlowski wrote: >> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe >> >> Devicetree source is a description of hardware and hardware has only one >> block @20008000 which can be configured either as eMMC or SDHC. Having >> two node for different modes is an obscure, unusual and confusing way to >> configure it. Instead the board file is supposed to customize the block >> to its needs, e.g. to SDHC mode. >> >> This fixes dtbs_check warning: >> arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dt.yaml: sdhc@20008000: $nodename:0: 'sdhc@20008000' does not match '^mmc(@.*)?$' >> >> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> >> >> --- >> >> Changes since v1: >> 1. Move also bus-width, suggested by Geert. >> --- >> .../microchip/microchip-mpfs-icicle-kit.dts | 11 +++++++- >> .../boot/dts/microchip/microchip-mpfs.dtsi | 28 +------------------ >> 2 files changed, 11 insertions(+), 28 deletions(-) >> >> diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts >> index 07f1f3cab686..fc1e5869df1b 100644 >> --- a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts >> +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts >> @@ -51,8 +51,17 @@ &serial3 { >> status = "okay"; >> }; >> >> -&sdcard { >> +&mmc { >> status = "okay"; >> + >> + bus-width = <4>; >> + disable-wp; >> + cap-sd-highspeed; >> + card-detect-delay = <200>; >> + sd-uhs-sdr12; >> + sd-uhs-sdr25; >> + sd-uhs-sdr50; >> + sd-uhs-sdr104; >> }; >> >> &emac0 { >> diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi >> index 5084b93188f0..83bc14860960 100644 >> --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi >> +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi >> @@ -262,39 +262,13 @@ serial3: serial@20104000 { >> status = "disabled"; >> }; >> >> - emmc: mmc@20008000 { >> - compatible = "cdns,sd4hc"; >> - reg = <0x0 0x20008000 0x0 0x1000>; >> - interrupt-parent = <&plic>; >> - interrupts = <88 89>; >> - pinctrl-names = "default"; >> - clocks = <&clkcfg 6>; >> - bus-width = <4>; >> - cap-mmc-highspeed; >> - mmc-ddr-3_3v; >> - max-frequency = <200000000>; >> - non-removable; >> - no-sd; >> - no-sdio; >> - voltage-ranges = <3300 3300>; >> - status = "disabled"; >> - }; >> - >> - sdcard: sdhc@20008000 { >> + mmc: mmc@20008000 { >> compatible = "cdns,sd4hc"; >> reg = <0x0 0x20008000 0x0 0x1000>; >> interrupt-parent = <&plic>; >> interrupts = <88>; >> pinctrl-names = "default"; >> clocks = <&clkcfg 6>; >> - bus-width = <4>; >> - disable-wp; >> - cap-sd-highspeed; >> - card-detect-delay = <200>; >> - sd-uhs-sdr12; >> - sd-uhs-sdr25; >> - sd-uhs-sdr50; >> - sd-uhs-sdr104; >> max-frequency = <200000000>; >> status = "disabled"; >> }; >> -- >> 2.30.2 >> > Hi Krzysztof, > Seems I missed most of this series other than the new vendor name in the V1. Unfortunately your name does not appear as maintainer for these files and get_maintainers.pl brings it only sometimes as a --git fallback. Also few addresses from that --git fallback are non working, so I am not always Cc-ing them. Sorry for that, I'll try to Cc you on next Microchip RISC-V submissions, however you should probably add a proper platform maintainer entry (similarly to ARM/ARM64 subarchitectures). > > We have been redoing the device tree for the mpfs/icicle kit partly dye > to some changes we made to the design. Previously SD and eMMC were > different FPGA designs but now both are in the same design and managed > by the bootloader, depending on where it finds the image to boot from. > Since then we've just been using the following single entry in the .dtsi: > > mmc: mmc@20008000 { /* Common node entry for emmc/sd */ > compatible = "cdns,sd4hc"; > reg = <0x0 0x20008000 0x0 0x1000>; > clocks = <&clkcfg CLK_MMC>; > interrupt-parent = <&plic>; > interrupts = <PLIC_INT_MMC_MAIN PLIC_INT_MMC_WAKEUP>; I'll switch to 2 interrupts. > bus-width = <4>; > cap-mmc-highspeed; > cap-sd-highspeed; > no-1-8-v; > disable-wp; > max-frequency = <200000000>; > status = "disabled"; I understand you prefer then the mmc node to be active? Before the DT had SDHC one enable, so my patch did not introduce changes (except mentioned interrupt). I can change it to mmc above with your explanation. Best regards, Krzysztof
On 21/09/2021 12:57, Krzysztof Kozlowski wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > On 21/09/2021 12:40, Conor.Dooley@microchip.com wrote: >> On 20/09/2021 16:08, Krzysztof Kozlowski wrote: >>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe >>> >>> Devicetree source is a description of hardware and hardware has only one >>> block @20008000 which can be configured either as eMMC or SDHC. Having >>> two node for different modes is an obscure, unusual and confusing way to >>> configure it. Instead the board file is supposed to customize the block >>> to its needs, e.g. to SDHC mode. >>> >>> This fixes dtbs_check warning: >>> arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dt.yaml: sdhc@20008000: $nodename:0: 'sdhc@20008000' does not match '^mmc(@.*)?$' >>> >>> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> >>> >>> --- >>> >>> Changes since v1: >>> 1. Move also bus-width, suggested by Geert. >>> --- >>> .../microchip/microchip-mpfs-icicle-kit.dts | 11 +++++++- >>> .../boot/dts/microchip/microchip-mpfs.dtsi | 28 +------------------ >>> 2 files changed, 11 insertions(+), 28 deletions(-) >>> >>> diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts >>> index 07f1f3cab686..fc1e5869df1b 100644 >>> --- a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts >>> +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts >>> @@ -51,8 +51,17 @@ &serial3 { >>> status = "okay"; >>> }; >>> >>> -&sdcard { >>> +&mmc { >>> status = "okay"; >>> + >>> + bus-width = <4>; >>> + disable-wp; >>> + cap-sd-highspeed; >>> + card-detect-delay = <200>; >>> + sd-uhs-sdr12; >>> + sd-uhs-sdr25; >>> + sd-uhs-sdr50; >>> + sd-uhs-sdr104; >>> }; >>> >>> &emac0 { >>> diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi >>> index 5084b93188f0..83bc14860960 100644 >>> --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi >>> +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi >>> @@ -262,39 +262,13 @@ serial3: serial@20104000 { >>> status = "disabled"; >>> }; >>> >>> - emmc: mmc@20008000 { >>> - compatible = "cdns,sd4hc"; >>> - reg = <0x0 0x20008000 0x0 0x1000>; >>> - interrupt-parent = <&plic>; >>> - interrupts = <88 89>; >>> - pinctrl-names = "default"; >>> - clocks = <&clkcfg 6>; >>> - bus-width = <4>; >>> - cap-mmc-highspeed; >>> - mmc-ddr-3_3v; >>> - max-frequency = <200000000>; >>> - non-removable; >>> - no-sd; >>> - no-sdio; >>> - voltage-ranges = <3300 3300>; >>> - status = "disabled"; >>> - }; >>> - >>> - sdcard: sdhc@20008000 { >>> + mmc: mmc@20008000 { >>> compatible = "cdns,sd4hc"; >>> reg = <0x0 0x20008000 0x0 0x1000>; >>> interrupt-parent = <&plic>; >>> interrupts = <88>; >>> pinctrl-names = "default"; >>> clocks = <&clkcfg 6>; >>> - bus-width = <4>; >>> - disable-wp; >>> - cap-sd-highspeed; >>> - card-detect-delay = <200>; >>> - sd-uhs-sdr12; >>> - sd-uhs-sdr25; >>> - sd-uhs-sdr50; >>> - sd-uhs-sdr104; >>> max-frequency = <200000000>; >>> status = "disabled"; >>> }; >>> -- >>> 2.30.2 >>> >> Hi Krzysztof, >> Seems I missed most of this series other than the new vendor name in the V1. > Unfortunately your name does not appear as maintainer for these files > and get_maintainers.pl brings it only sometimes as a --git fallback. > Also few addresses from that --git fallback are non working, so I am not > always Cc-ing them. Sorry for that, I'll try to Cc you on next Microchip > RISC-V submissions, however you should probably add a proper platform > maintainer entry (similarly to ARM/ARM64 subarchitectures). Yeah, I just usually read every message and happened to miss part of the series. Seems like none of my coworkers are listed against the device tree so I'll get someone added. >> We have been redoing the device tree for the mpfs/icicle kit partly dye >> to some changes we made to the design. Previously SD and eMMC were >> different FPGA designs but now both are in the same design and managed >> by the bootloader, depending on where it finds the image to boot from. >> Since then we've just been using the following single entry in the .dtsi: >> >> mmc: mmc@20008000 { /* Common node entry for emmc/sd */ >> compatible = "cdns,sd4hc"; >> reg = <0x0 0x20008000 0x0 0x1000>; >> clocks = <&clkcfg CLK_MMC>; >> interrupt-parent = <&plic>; >> interrupts = <PLIC_INT_MMC_MAIN PLIC_INT_MMC_WAKEUP>; > I'll switch to 2 interrupts. > >> bus-width = <4>; >> cap-mmc-highspeed; >> cap-sd-highspeed; >> no-1-8-v; >> disable-wp; >> max-frequency = <200000000>; >> status = "disabled"; > I understand you prefer then the mmc node to be active? Before the DT > had SDHC one enable, so my patch did not introduce changes (except > mentioned interrupt). > > I can change it to mmc above with your explanation. It's named mmc but it works for both SD card and eMMC, just depends on whats selected during boot. I'm not sure what is the appropriate thing to actually name the node in this case, maybe you know better than I do? > patch did not introduce changes Yeah, I just figured that if changes are being made then its worth switching to the single entry now rather than waiting and doing it in a few weeks time. > > > Best regards, > Krzysztof
On Mon, 20 Sep 2021 17:08:02 +0200, Krzysztof Kozlowski wrote: > The Microchip MPFS Icicle Kit uses Cadence SD/SDIO/eMMC Host Controller > without any additional vendor compatible: > > arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dt.yaml: mmc@20008000: compatible:0: 'cdns,sd4hc' is not one of ['socionext,uniphier-sd4hc'] > arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dt.yaml: mmc@20008000: compatible: ['cdns,sd4hc'] is too short > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> > > --- > > Changes since v2: > 1. Document vendor compatible instead of dropping it. > --- > Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml | 1 + > 1 file changed, 1 insertion(+) > Acked-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml index af7442f73881..4207fed62dfe 100644 --- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml @@ -17,6 +17,7 @@ properties: compatible: items: - enum: + - microchip,mpfs-sd4hc - socionext,uniphier-sd4hc - const: cdns,sd4hc
The Microchip MPFS Icicle Kit uses Cadence SD/SDIO/eMMC Host Controller without any additional vendor compatible: arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dt.yaml: mmc@20008000: compatible:0: 'cdns,sd4hc' is not one of ['socionext,uniphier-sd4hc'] arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dt.yaml: mmc@20008000: compatible: ['cdns,sd4hc'] is too short Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> --- Changes since v2: 1. Document vendor compatible instead of dropping it. --- Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml | 1 + 1 file changed, 1 insertion(+)