| Message ID | 20210920144944.162431-1-krzysztof.kozlowski@canonical.com |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | dt-bindings: clock: fu740-prci: add reset-cells | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/dt-meta-schema | success | |
| robh/dtbs-check | success |
On Mon, 20 Sep 2021 16:49:44 +0200, Krzysztof Kozlowski wrote: > The SiFive FU740 Power Reset Clock Interrupt Controller is a reset line > provider so add respective reset-cells property to fix: > > arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dt.yaml: clock-controller@10000000: > '#reset-cells' does not match any of the regexes: 'pinctrl-[0-9]+' > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> > --- > .../devicetree/bindings/clock/sifive/fu740-prci.yaml | 4 ++++ > 1 file changed, 4 insertions(+) > Reviewed-by: Rob Herring <robh@kernel.org>
On Thu, 23 Sep 2021 09:59:32 PDT (-0700), robh@kernel.org wrote: > On Mon, 20 Sep 2021 16:49:44 +0200, Krzysztof Kozlowski wrote: >> The SiFive FU740 Power Reset Clock Interrupt Controller is a reset line >> provider so add respective reset-cells property to fix: >> >> arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dt.yaml: clock-controller@10000000: >> '#reset-cells' does not match any of the regexes: 'pinctrl-[0-9]+' >> >> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> >> --- >> .../devicetree/bindings/clock/sifive/fu740-prci.yaml | 4 ++++ >> 1 file changed, 4 insertions(+) >> > > Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Palmer Dabbelt <palmerdabbelt@google.com> For some reason I thought these went through your tree, LMK if you were planning on having me take it through mine. Thanks!
Am Freitag, 8. Oktober 2021, 03:29:17 CEST schrieb Palmer Dabbelt: > On Thu, 23 Sep 2021 09:59:32 PDT (-0700), robh@kernel.org wrote: > > On Mon, 20 Sep 2021 16:49:44 +0200, Krzysztof Kozlowski wrote: > >> The SiFive FU740 Power Reset Clock Interrupt Controller is a reset line > >> provider so add respective reset-cells property to fix: > >> > >> arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dt.yaml: clock-controller@10000000: > >> '#reset-cells' does not match any of the regexes: 'pinctrl-[0-9]+' > >> > >> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> > >> --- > >> .../devicetree/bindings/clock/sifive/fu740-prci.yaml | 4 ++++ > >> 1 file changed, 4 insertions(+) > >> > > > > Reviewed-by: Rob Herring <robh@kernel.org> > > Acked-by: Palmer Dabbelt <palmerdabbelt@google.com> > > For some reason I thought these went through your tree, LMK if you were > planning on having me take it through mine. Normally both driver + binding patches go through the driver-tree and actual dts changes through the tree carrying the dts files. So for a clock-patch this should be the clock-tree aka Mike Turquette and Stephen Boyd - already in Cc of original patch, so I'd assume they'll pick it up. Heiko
Quoting Krzysztof Kozlowski (2021-09-20 07:49:44) > The SiFive FU740 Power Reset Clock Interrupt Controller is a reset line > provider so add respective reset-cells property to fix: > > arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dt.yaml: clock-controller@10000000: > '#reset-cells' does not match any of the regexes: 'pinctrl-[0-9]+' > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> > --- Applied to clk-next
diff --git a/Documentation/devicetree/bindings/clock/sifive/fu740-prci.yaml b/Documentation/devicetree/bindings/clock/sifive/fu740-prci.yaml index e17143cac316..252085a0cf65 100644 --- a/Documentation/devicetree/bindings/clock/sifive/fu740-prci.yaml +++ b/Documentation/devicetree/bindings/clock/sifive/fu740-prci.yaml @@ -42,6 +42,9 @@ properties: "#clock-cells": const: 1 + "#reset-cells": + const: 1 + required: - compatible - reg @@ -57,4 +60,5 @@ examples: reg = <0x10000000 0x1000>; clocks = <&hfclk>, <&rtcclk>; #clock-cells = <1>; + #reset-cells = <1>; };
The SiFive FU740 Power Reset Clock Interrupt Controller is a reset line provider so add respective reset-cells property to fix: arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dt.yaml: clock-controller@10000000: '#reset-cells' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> --- .../devicetree/bindings/clock/sifive/fu740-prci.yaml | 4 ++++ 1 file changed, 4 insertions(+)