| Message ID | 20210920050823.10853-2-bbhushan2@marvell.com |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | cn10k DDR Performance monitor support | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/dt-meta-schema | success | |
| robh/dtbs-check | success |
Adding Bhaskara > -----Original Message----- > From: Bharat Bhushan <bbhushan2@marvell.com> > Sent: Monday, September 20, 2021 10:38 AM > To: will@kernel.org; mark.rutland@arm.com; robh+dt@kernel.org; linux-arm- > kernel@lists.infradead.org; devicetree@vger.kernel.org; linux- > kernel@vger.kernel.org > Cc: Bharat Bhushan <bbhushan2@marvell.com> > Subject: [PATCH v4 1/4] dt-bindings: perf: marvell: cn10k ddr performance > monitor > > Add binding documentation for the Marvell CN10k DDR performance monitor > unit. > > Signed-off-by: Bharat Bhushan <bbhushan2@marvell.com> > Reviewed-by: Rob Herring <robh@kernel.org> > --- > v3->v4: > - Added Rob Herring reviewed-by > > v2->v3: > - dt-binding, ddrcpmu@1 -> pmu@87e1c0000000 > > v1->v2: > - DT binding changed to new DT Schema > > .../bindings/perf/marvell-cn10k-ddr.yaml | 37 +++++++++++++++++++ > 1 file changed, 37 insertions(+) > create mode 100644 Documentation/devicetree/bindings/perf/marvell-cn10k- > ddr.yaml > > diff --git a/Documentation/devicetree/bindings/perf/marvell-cn10k-ddr.yaml > b/Documentation/devicetree/bindings/perf/marvell-cn10k-ddr.yaml > new file mode 100644 > index 000000000000..a18dd0a8c43a > --- /dev/null > +++ b/Documentation/devicetree/bindings/perf/marvell-cn10k-ddr.yaml > @@ -0,0 +1,37 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/perf/marvell-cn10k-ddr.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Marvell CN10K DDR performance monitor > + > +maintainers: > + - Bharat Bhushan <bbhushan2@marvell.com> > + > +properties: > + compatible: > + items: > + - enum: > + - marvell,cn10k-ddr-pmu > + > + reg: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + > +additionalProperties: false > + > +examples: > + - | > + bus { > + #address-cells = <2>; > + #size-cells = <2>; > + > + pmu@87e1c0000000 { > + compatible = "marvell,cn10k-ddr-pmu"; > + reg = <0x87e1 0xc0000000 0x0 0x10000>; > + }; > + }; > -- > 2.17.1
diff --git a/Documentation/devicetree/bindings/perf/marvell-cn10k-ddr.yaml b/Documentation/devicetree/bindings/perf/marvell-cn10k-ddr.yaml new file mode 100644 index 000000000000..a18dd0a8c43a --- /dev/null +++ b/Documentation/devicetree/bindings/perf/marvell-cn10k-ddr.yaml @@ -0,0 +1,37 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/perf/marvell-cn10k-ddr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell CN10K DDR performance monitor + +maintainers: + - Bharat Bhushan <bbhushan2@marvell.com> + +properties: + compatible: + items: + - enum: + - marvell,cn10k-ddr-pmu + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + bus { + #address-cells = <2>; + #size-cells = <2>; + + pmu@87e1c0000000 { + compatible = "marvell,cn10k-ddr-pmu"; + reg = <0x87e1 0xc0000000 0x0 0x10000>; + }; + };