From patchwork Fri Jun 11 09:23:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hsin-Yi Wang X-Patchwork-Id: 1490839 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256 header.s=google header.b=FwPbFhKx; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4G1b6T0G2Nz9sXL for ; Fri, 11 Jun 2021 19:25:21 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230248AbhFKJ1R (ORCPT ); Fri, 11 Jun 2021 05:27:17 -0400 Received: from mail-pj1-f49.google.com ([209.85.216.49]:37462 "EHLO mail-pj1-f49.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231447AbhFKJ1P (ORCPT ); Fri, 11 Jun 2021 05:27:15 -0400 Received: by mail-pj1-f49.google.com with SMTP id 22-20020a17090a0c16b0290164a5354ad0so5512683pjs.2 for ; Fri, 11 Jun 2021 02:25:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=UgBQrK5SlymCkI5jz+k5p8kag+QovCuycBqNVsBxvAM=; b=FwPbFhKxFYgWFpCahJKYBrhdtlcOgiLmCAJceVjIDXig9MrQM73N4ugumbv8xqaQbW 9YynqByFEJxZdMEEGwe2L3ia27i5R3UYop+VZVpwUM1PChIOXECX6716ph3Vzf3geHqF 0nuV0rksmeMjDB8kiHmBxkq/ISqkRWht5H5DM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=UgBQrK5SlymCkI5jz+k5p8kag+QovCuycBqNVsBxvAM=; b=X/CilRXsB5z7FRy296PLniuZR+2O/RLYRSTw5/CAkgKscVY2zB7PrIpysEuPz/Gd98 k8NScCX3QC1q+kC3240pQzVddK12ngLDyhP6gGclo2zqb3uUzvoMi2LzF74azfZ7CHql sg9IbB8zsGVx0OXOTnczOFKAFphFv8Bj14S3GZ0MqI+6RHI6vlyPPPW5E2iZQ1LRP8i5 hOMk+p6+4ORN4KfDT2lZhoOVw5OkDYqoxiF3b/MrpHKeJDUOieoHq8OCfEDOzDWfurQK eQAgzrQsfFn5XnkzDBlgODIyM6wiQC2cYjm2dB4p3yry77SMmO32QjL3DtKAFHDyPAeL /Bgg== X-Gm-Message-State: AOAM530J1IKIz5PsA4Z0amBHWLXALR1lROTlXhBfJeqPOQOLLGtPeQU3 Akk0hKX1tdRnG9b4xFX6vCBokA== X-Google-Smtp-Source: ABdhPJzhftfUCjMVu5l8LE/zu4J6Xy0U1HR/8TKZLifQgd/gR+DP0xfknF5i/OPekkWa4pSWKzDYBg== X-Received: by 2002:a17:902:7401:b029:102:34f7:48f5 with SMTP id g1-20020a1709027401b029010234f748f5mr3095678pll.47.1623403441355; Fri, 11 Jun 2021 02:24:01 -0700 (PDT) Received: from hsinyi-z840.tpe.corp.google.com ([2401:fa00:1:10:73d3:4412:54cc:752d]) by smtp.gmail.com with ESMTPSA id q68sm10394037pjq.45.2021.06.11.02.23.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Jun 2021 02:24:01 -0700 (PDT) From: Hsin-Yi Wang To: Matthias Brugger , Rob Herring Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, maoguang.meng@mediatek.com, yong.wu@mediatek.com Subject: [PATCH v3 1/2] dt-bindings: mediatek: convert mtk jpeg decoder/encoder to yaml Date: Fri, 11 Jun 2021 17:23:56 +0800 Message-Id: <20210611092357.2930310-1-hsinyi@chromium.org> X-Mailer: git-send-email 2.32.0.272.g935e593368-goog MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Convert mediatek jpeg decoder and encoder bindings to yaml. Signed-off-by: Hsin-Yi Wang --- .../bindings/media/mediatek-jpeg-decoder.txt | 38 --------- .../bindings/media/mediatek-jpeg-decoder.yaml | 85 +++++++++++++++++++ .../bindings/media/mediatek-jpeg-encoder.txt | 35 -------- .../bindings/media/mediatek-jpeg-encoder.yaml | 77 +++++++++++++++++ 4 files changed, 162 insertions(+), 73 deletions(-) delete mode 100644 Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.txt create mode 100644 Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml delete mode 100644 Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.txt create mode 100644 Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.txt b/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.txt deleted file mode 100644 index 39c1028b2dfb4..0000000000000 --- a/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.txt +++ /dev/null @@ -1,38 +0,0 @@ -* Mediatek JPEG Decoder - -Mediatek JPEG Decoder is the JPEG decode hardware present in Mediatek SoCs - -Required properties: -- compatible : must be one of the following string: - "mediatek,mt8173-jpgdec" - "mediatek,mt7623-jpgdec", "mediatek,mt2701-jpgdec" - "mediatek,mt2701-jpgdec" -- reg : physical base address of the jpeg decoder registers and length of - memory mapped region. -- interrupts : interrupt number to the interrupt controller. -- clocks: device clocks, see - Documentation/devicetree/bindings/clock/clock-bindings.txt for details. -- clock-names: must contain "jpgdec-smi" and "jpgdec". -- power-domains: a phandle to the power domain, see - Documentation/devicetree/bindings/power/power_domain.txt for details. -- mediatek,larb: must contain the local arbiters in the current Socs, see - Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml - for details. -- iommus: should point to the respective IOMMU block with master port as - argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml - for details. - -Example: - jpegdec: jpegdec@15004000 { - compatible = "mediatek,mt2701-jpgdec"; - reg = <0 0x15004000 0 0x1000>; - interrupts = ; - clocks = <&imgsys CLK_IMG_JPGDEC_SMI>, - <&imgsys CLK_IMG_JPGDEC>; - clock-names = "jpgdec-smi", - "jpgdec"; - power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>; - mediatek,larb = <&larb2>; - iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>, - <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>; - }; diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml new file mode 100644 index 0000000000000..43a611c17ed59 --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml @@ -0,0 +1,85 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/mediatek-jpeg-decoder.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek JPEG Decoder Device Tree Bindings + +maintainers: + - Xia Jiang + +description: |- + Mediatek JPEG Decoder is the JPEG decode hardware present in Mediatek SoCs + +properties: + compatible: + oneOf: + - items: + - const: mediatek,mt8173-jpgdec + - items: + - const: mediatek,mt2701-jpgdec + - items: + - enum: + - mediatek,mt7623-jpgdec + - const: mediatek,mt2701-jpgdec + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 2 + minItems: 2 + + clock-names: + items: + - const: jpgdec-smi + - const: jpgdec + + power-domains: + maxItems: 1 + + mediatek,larb: + $ref: '/schemas/types.yaml#/definitions/phandle' + description: | + Must contain the local arbiters in the current Socs, see + Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt + for details. + + iommus: + maxItems: 2 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - power-domains + - mediatek,larb + - iommus + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + jpegdec: jpegdec@15004000 { + compatible = "mediatek,mt2701-jpgdec"; + reg = <0x15004000 0x1000>; + interrupts = ; + clocks = <&imgsys CLK_IMG_JPGDEC_SMI>, + <&imgsys CLK_IMG_JPGDEC>; + clock-names = "jpgdec-smi", + "jpgdec"; + power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>; + mediatek,larb = <&larb2>; + iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>, + <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>; + }; diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.txt b/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.txt deleted file mode 100644 index 5e53c6ab52d01..0000000000000 --- a/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.txt +++ /dev/null @@ -1,35 +0,0 @@ -* MediaTek JPEG Encoder - -MediaTek JPEG Encoder is the JPEG encode hardware present in MediaTek SoCs - -Required properties: -- compatible : "mediatek,mt2701-jpgenc" - followed by "mediatek,mtk-jpgenc" -- reg : physical base address of the JPEG encoder registers and length of - memory mapped region. -- interrupts : interrupt number to the interrupt controller. -- clocks: device clocks, see - Documentation/devicetree/bindings/clock/clock-bindings.txt for details. -- clock-names: must contain "jpgenc". It is the clock of JPEG encoder. -- power-domains: a phandle to the power domain, see - Documentation/devicetree/bindings/power/power_domain.txt for details. -- mediatek,larb: must contain the local arbiters in the current SoCs, see - Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml - for details. -- iommus: should point to the respective IOMMU block with master port as - argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml - for details. - -Example: - jpegenc: jpegenc@1500a000 { - compatible = "mediatek,mt2701-jpgenc", - "mediatek,mtk-jpgenc"; - reg = <0 0x1500a000 0 0x1000>; - interrupts = ; - clocks = <&imgsys CLK_IMG_VENC>; - clock-names = "jpgenc"; - power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>; - mediatek,larb = <&larb2>; - iommus = <&iommu MT2701_M4U_PORT_JPGENC_RDMA>, - <&iommu MT2701_M4U_PORT_JPGENC_BSDMA>; - }; diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml b/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml new file mode 100644 index 0000000000000..e4e791d76cdaa --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml @@ -0,0 +1,77 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/mediatek-jpeg-encoder.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek JPEG Encoder Device Tree Bindings + +maintainers: + - Xia Jiang + +description: |- + MediaTek JPEG Encoder is the JPEG encode hardware present in MediaTek SoCs + +properties: + compatible: + items: + - enum: + - mediatek,mt2701-jpgenc + - mediatek,mt8183-jpgenc + - const: mediatek,mtk-jpgenc + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: jpgenc + + power-domains: + maxItems: 1 + + mediatek,larb: + $ref: '/schemas/types.yaml#/definitions/phandle' + description: | + Must contain the local arbiters in the current Socs, see + Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt + for details. + + iommus: + maxItems: 2 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - power-domains + - mediatek,larb + - iommus + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + jpegenc: jpegenc@1500a000 { + compatible = "mediatek,mt2701-jpgenc", + "mediatek,mtk-jpgenc"; + reg = <0x1500a000 0x1000>; + interrupts = ; + clocks = <&imgsys CLK_IMG_VENC>; + clock-names = "jpgenc"; + power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>; + mediatek,larb = <&larb2>; + iommus = <&iommu MT2701_M4U_PORT_JPGENC_RDMA>, + <&iommu MT2701_M4U_PORT_JPGENC_BSDMA>; + };