| Message ID | 20200308163230.4002-5-afaerber@suse.de |
|---|---|
| State | Changes Requested, archived |
| Headers | show |
| Series | ARM: Initial Sunplus Plus1 SP7021 and BPI-F2S support | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/dt-meta-schema | success |
On Sun, Mar 08, 2020 at 05:32:22PM +0100, Andreas Färber wrote: > The Sunplus SP7021 SoC has an interrupt mux. > > Cc: Wells Lu 呂芳騰 <wells.lu@sunplus.com> > Signed-off-by: Andreas Färber <afaerber@suse.de> > --- > .../sunplus,pentagram-intc.yaml | 50 ++++++++++++++++++++++ > 1 file changed, 50 insertions(+) > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/sunplus,pentagram-intc.yaml > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/sunplus,pentagram-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/sunplus,pentagram-intc.yaml > new file mode 100644 > index 000000000000..baaf7bcd4a71 > --- /dev/null > +++ b/Documentation/devicetree/bindings/interrupt-controller/sunplus,pentagram-intc.yaml > @@ -0,0 +1,50 @@ > +# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/interrupt-controller/sunplus,pentagram-intc.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Sunplus Pentagram SoC Interrupt Controller > + > +maintainers: > + - Andreas Färber <afaerber@suse.de> > + > +allOf: > + - $ref: /schemas/interrupt-controller.yaml# No need for this. It's applied based on the node name. > + > +properties: > + compatible: > + const: sunplus,sp7021-intc > + > + reg: > + maxItems: 2 Need to define what each one is. > + > + interrupts: > + maxItems: 2 Same here. > + > + interrupt-controller: true > + > + "#interrupt-cells": > + const: 2 > + > +required: > + - compatible > + - reg > + - interrupt-controller > + > +unevaluatedProperties: false > + > +examples: > + - | > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + > + interrupt-controller@9c000780 { > + compatible = "sunplus,sp7021-intc"; > + reg = <0x9c000780 0x80>, > + <0x9c000a80 0x80>; > + interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > +... > -- > 2.16.4 >
diff --git a/Documentation/devicetree/bindings/interrupt-controller/sunplus,pentagram-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/sunplus,pentagram-intc.yaml new file mode 100644 index 000000000000..baaf7bcd4a71 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/sunplus,pentagram-intc.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/sunplus,pentagram-intc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sunplus Pentagram SoC Interrupt Controller + +maintainers: + - Andreas Färber <afaerber@suse.de> + +allOf: + - $ref: /schemas/interrupt-controller.yaml# + +properties: + compatible: + const: sunplus,sp7021-intc + + reg: + maxItems: 2 + + interrupts: + maxItems: 2 + + interrupt-controller: true + + "#interrupt-cells": + const: 2 + +required: + - compatible + - reg + - interrupt-controller + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + interrupt-controller@9c000780 { + compatible = "sunplus,sp7021-intc"; + reg = <0x9c000780 0x80>, + <0x9c000a80 0x80>; + interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <2>; + }; +...
The Sunplus SP7021 SoC has an interrupt mux. Cc: Wells Lu 呂芳騰 <wells.lu@sunplus.com> Signed-off-by: Andreas Färber <afaerber@suse.de> --- .../sunplus,pentagram-intc.yaml | 50 ++++++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/sunplus,pentagram-intc.yaml