Message ID | 20200306131049.37EDD8030708@mail.baikalelectronics.ru |
---|---|
State | Changes Requested, archived |
Headers | show |
Series | None | expand |
Context | Check | Description |
---|---|---|
robh/checkpatch | success |
On Fri, Mar 06, 2020 at 04:10:31PM +0300, Sergey.Semin@baikalelectronics.ru wrote: > From: Serge Semin <Sergey.Semin@baikalelectronics.ru> > > This array property is used to indicate the maximum burst transaction > length supported by each DMA channel. > > Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> > Signed-off-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> > Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> > Cc: Paul Burton <paulburton@kernel.org> > Cc: Ralf Baechle <ralf@linux-mips.org> > --- > .../devicetree/bindings/dma/snps,dma-spear1340.yaml | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml b/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml > index d7f9383ceb8f..308ec6482064 100644 > --- a/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml > +++ b/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml > @@ -126,6 +126,18 @@ properties: > enum: [0, 1] > default: 0 > > + snps,max-burst-len: > + description: | > + Maximum length of burst transactions supported by hardware. > + It's an array property with one cell per channel in units of > + CTLx register SRC_TR_WIDTH/DST_TR_WIDTH field. > + allOf: > + - $ref: /schemas/types.yaml#/definitions/uint32-array > + - maxItems: 8 > + items: > + enum: [4, 8, 16, 32, 64, 128, 256] > + default: 0 The default needs to be an allowed value in the enum. Rob
On Thu, Mar 12, 2020 at 04:33:30PM -0500, Rob Herring wrote: > On Fri, Mar 06, 2020 at 04:10:31PM +0300, Sergey.Semin@baikalelectronics.ru wrote: > > From: Serge Semin <Sergey.Semin@baikalelectronics.ru> > > > > This array property is used to indicate the maximum burst transaction > > length supported by each DMA channel. > > > > Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> > > Signed-off-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> > > Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> > > Cc: Paul Burton <paulburton@kernel.org> > > Cc: Ralf Baechle <ralf@linux-mips.org> > > --- > > .../devicetree/bindings/dma/snps,dma-spear1340.yaml | 12 ++++++++++++ > > 1 file changed, 12 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml b/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml > > index d7f9383ceb8f..308ec6482064 100644 > > --- a/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml > > +++ b/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml > > @@ -126,6 +126,18 @@ properties: > > enum: [0, 1] > > default: 0 > > > > + snps,max-burst-len: > > + description: | > > + Maximum length of burst transactions supported by hardware. > > + It's an array property with one cell per channel in units of > > + CTLx register SRC_TR_WIDTH/DST_TR_WIDTH field. > > + allOf: > > + - $ref: /schemas/types.yaml#/definitions/uint32-array > > + - maxItems: 8 > > + items: > > + enum: [4, 8, 16, 32, 64, 128, 256] > > + default: 0 > > The default needs to be an allowed value in the enum. Right. I'll fix it. -Sergey > > Rob
diff --git a/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml b/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml index d7f9383ceb8f..308ec6482064 100644 --- a/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml +++ b/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml @@ -126,6 +126,18 @@ properties: enum: [0, 1] default: 0 + snps,max-burst-len: + description: | + Maximum length of burst transactions supported by hardware. + It's an array property with one cell per channel in units of + CTLx register SRC_TR_WIDTH/DST_TR_WIDTH field. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32-array + - maxItems: 8 + items: + enum: [4, 8, 16, 32, 64, 128, 256] + default: 0 + snps,dma-protection-control: description: | Bits one-to-one passed to the AHB HPROT[3:1] bus. Each bit setting