From patchwork Wed Jun 19 02:32:04 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brian Masney X-Patchwork-Id: 1118424 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=onstation.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=onstation.org header.i=@onstation.org header.b="gQVJyvOV"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 45T8B04gbrz9sPG for ; Wed, 19 Jun 2019 12:32:40 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730194AbfFSCcj (ORCPT ); Tue, 18 Jun 2019 22:32:39 -0400 Received: from onstation.org ([52.200.56.107]:35106 "EHLO onstation.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726181AbfFSCcO (ORCPT ); Tue, 18 Jun 2019 22:32:14 -0400 Received: from localhost.localdomain (c-98-239-145-235.hsd1.wv.comcast.net [98.239.145.235]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: masneyb) by onstation.org (Postfix) with ESMTPSA id C978D3E9FC; Wed, 19 Jun 2019 02:32:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=onstation.org; s=default; t=1560911533; bh=pEcPVfqTl/GxBCaCQsnvEry57usKGa0AqqX5MQfaDP8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=gQVJyvOV4XEHwAuXUbr28YlyyMwZZauXJNZrso893JJu90bFmKZvFLuqWjk6hokbS Q5VQ8DCo+8vfArnhQjUVYXWqWbMzkq7COOTaeNThL+qwLTe66C3fxRuqVxd3iOqTV9 Pooao7EF6U59U045cRxrWWcr3A/Oks3mixwR0MLc= From: Brian Masney To: bjorn.andersson@linaro.org, agross@kernel.org, david.brown@linaro.org, robdclark@gmail.com, sean@poorly.run, robh+dt@kernel.org Cc: airlied@linux.ie, daniel@ffwll.ch, mark.rutland@arm.com, jonathan@marek.ca, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org Subject: [PATCH v2 1/6] dt-bindings: soc: qcom: add On Chip MEMory (OCMEM) bindings Date: Tue, 18 Jun 2019 22:32:04 -0400 Message-Id: <20190619023209.10036-2-masneyb@onstation.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190619023209.10036-1-masneyb@onstation.org> References: <20190619023209.10036-1-masneyb@onstation.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add device tree bindings for the On Chip Memory (OCMEM) that is present on some Qualcomm Snapdragon SoCs. Signed-off-by: Brian Masney --- Changes since v1: - Rename qcom,ocmem-msm8974 to qcom,msm8974-ocmem - Renamed reg-names to ctrl and mem - update hardware description - moved from soc to sram namespace in the device tree bindings .../bindings/sram/qcom/qcom,ocmem.yaml | 64 +++++++++++++++++++ 1 file changed, 64 insertions(+) create mode 100644 Documentation/devicetree/bindings/sram/qcom/qcom,ocmem.yaml diff --git a/Documentation/devicetree/bindings/sram/qcom/qcom,ocmem.yaml b/Documentation/devicetree/bindings/sram/qcom/qcom,ocmem.yaml new file mode 100644 index 000000000000..1bd15824968e --- /dev/null +++ b/Documentation/devicetree/bindings/sram/qcom/qcom,ocmem.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sram/qcom/qcom,ocmem.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: On Chip Memory (OCMEM) that is present on some Qualcomm Snapdragon SoCs. + +maintainers: + - Brian Masney + +description: | + The On Chip Memory (OCMEM) is typically used by the GPU, camera/video, and + audio components on some Snapdragon SoCs. + +properties: + compatible: + const: qcom,msm8974-ocmem + + reg: + items: + - description: Control registers + - description: OCMEM address range + + reg-names: + items: + - const: ctrl + - const: mem + + clocks: + items: + - description: Core clock + - description: Interface clock + + clock-names: + items: + - const: core + - const: iface + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + +examples: + - | + #include + #include + + ocmem: ocmem@fdd00000 { + compatible = "qcom,msm8974-ocmem"; + + reg = <0xfdd00000 0x2000>, + <0xfec00000 0x180000>; + reg-names = "ctrl", + "mem"; + + clocks = <&rpmcc RPM_SMD_OCMEMGX_CLK>, + <&mmcc OCMEMCX_OCMEMNOC_CLK>; + clock-names = "core", + "iface"; + };