| Message ID | 20190228070137.30867-1-l.stach@pengutronix.de |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | [v2,1/3] dt-bindings: imx-ocotp: Add i.MX8MQ compatible | expand |
Hi Srinivas, friendly ping. This series has been reviewed and acked, so I think it should be good to go in. Regards, Lucas Am Donnerstag, den 28.02.2019, 08:01 +0100 schrieb Lucas Stach: > Add compatible for i.MX8MQ and add i.MX7D/S, i.MX7ULP and i.M8MQ > to the description. > > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> > > Reviewed-by: Rob Herring <robh@kernel.org> > > Reviewed-by: Abel Vesa <abel.vesa@nxp.com> > --- > v2: > - rebased on linux-next > - collected reviewed > --- > Documentation/devicetree/bindings/nvmem/imx-ocotp.txt | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt b/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt > index 7a999a135e56..68f7d6fdd140 100644 > --- a/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt > +++ b/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt > @@ -1,7 +1,8 @@ > Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings > > This binding represents the on-chip eFuse OTP controller found on > -i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX, i.MX6UL, i.MX6ULL/ULZ and i.MX6SLL SoCs. > +i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX, i.MX6UL, i.MX6ULL/ULZ, i.MX6SLL, > +i.MX7D/S, i.MX7ULP and i.MX8MQ SoCs. > > Required properties: > - compatible: should be one of > @@ -13,6 +14,7 @@ Required properties: > > "fsl,imx7d-ocotp" (i.MX7D/S), > > "fsl,imx6sll-ocotp" (i.MX6SLL), > > "fsl,imx7ulp-ocotp" (i.MX7ULP), > > + "fsl,imx8mq-ocotp" (i.MX8MQ), > > followed by "syscon". > - #address-cells : Should be 1 > - #size-cells : Should be 1
On 28/02/2019 07:01, Lucas Stach wrote: > Add compatible for i.MX8MQ and add i.MX7D/S, i.MX7ULP and i.M8MQ > to the description. Thanks, Applied series to nvmem next. --srini
diff --git a/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt b/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt index 7a999a135e56..68f7d6fdd140 100644 --- a/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt +++ b/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt @@ -1,7 +1,8 @@ Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings This binding represents the on-chip eFuse OTP controller found on -i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX, i.MX6UL, i.MX6ULL/ULZ and i.MX6SLL SoCs. +i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX, i.MX6UL, i.MX6ULL/ULZ, i.MX6SLL, +i.MX7D/S, i.MX7ULP and i.MX8MQ SoCs. Required properties: - compatible: should be one of @@ -13,6 +14,7 @@ Required properties: "fsl,imx7d-ocotp" (i.MX7D/S), "fsl,imx6sll-ocotp" (i.MX6SLL), "fsl,imx7ulp-ocotp" (i.MX7ULP), + "fsl,imx8mq-ocotp" (i.MX8MQ), followed by "syscon". - #address-cells : Should be 1 - #size-cells : Should be 1