diff mbox series

[v2] dt-bindings: add register based devices' mux controller DT bindings

Message ID 20190221181514.5964-1-pankaj.bansal@nxp.com
State Superseded, archived
Headers show
Series [v2] dt-bindings: add register based devices' mux controller DT bindings | expand

Checks

Context Check Description
robh/checkpatch success

Commit Message

Pankaj Bansal Feb. 21, 2019, 12:50 p.m. UTC
This adds device tree binding documentation for generic register based
multiplexer controlled by a bitfields in a parent device's register range.

Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
---

Notes:
    V2:
    - Removed syscon reference from txt file
    - Removed loading zeroes from hex numbers
    - Fixed the depth of dts nodes
    - fixed minor formatting errors

 .../devicetree/bindings/mux/reg-mux.txt      | 83 ++++++++++++++++++
 1 file changed, 83 insertions(+)

Comments

Peter Rosin Feb. 21, 2019, 4:35 p.m. UTC | #1
On 2019-02-21 13:50, Pankaj Bansal wrote:
> This adds device tree binding documentation for generic register based
> multiplexer controlled by a bitfields in a parent device's register range.
> 
> Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
> ---
> 
> Notes:
>     V2:
>     - Removed syscon reference from txt file
>     - Removed loading zeroes from hex numbers
>     - Fixed the depth of dts nodes
>     - fixed minor formatting errors
> 
>  .../devicetree/bindings/mux/reg-mux.txt      | 83 ++++++++++++++++++
>  1 file changed, 83 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mux/reg-mux.txt b/Documentation/devicetree/bindings/mux/reg-mux.txt
> new file mode 100644
> index 000000000000..260c6f511b59
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mux/reg-mux.txt
> @@ -0,0 +1,83 @@
> +Generic register bitfield-based multiplexer controller bindings
> +
> +Define register bitfields to be used to control multiplexers. The parent
> +device tree node must be a device node to provide register r/w access.
> +
> +Required properties:
> +- compatible : "reg-mux"
> +- #mux-control-cells : <1>
> +- mux-reg-masks : an array of register offset and pre-shifted bitfield mask
> +                  pairs, each describing a single mux control.
> +* Standard mux-controller bindings as decribed in mux-controller.txt
> +
> +Optional properties:
> +- idle-states : if present, the state the muxes will have when idle. The
> +		special state MUX_IDLE_AS_IS is the default.
> +
> +The multiplexer state of each multiplexer is defined as the value of the
> +bitfield described by the corresponding register offset and bitfield mask pair
> +in the mux-reg-masks array, accessed through the parent register r/w functions.
> +
> +Example:
> +
> +&i2c0 {
> +	fpga@66 { // fpga connected to i2c
> +		compatible = "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c",
> +			     "simple-mfd";
> +		reg = <0x66>;
> +
> +		mux: mux-controller { // Mux Producer
> +			compatible = "reg-mux";
> +			#mux-control-cells = <1>;
> +			mux-reg-masks = <0x54 0xf8>, /* 0: reg 0x54, bits 7:3 */
> +					<0x54 0x07>; /* 1: reg 0x54, bits 2:0 */
> +		};
> +	};
> +};
> +
> +mdio-mux-1 { // Mux consumer
> +	compatible = "mdio-mux";
> +	mux-controls = <&mux 0>;
> +	mdio-parent-bus = <&emdio1>;
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +
> +	mdio@0 {
> +		reg = <0x0>;
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +	};
> +
> +	mdio@40 {
> +		reg = <0x40>;

Hmmm, I didn't see this in V1, but the reg value is supposed to be the
value within the field. The driver will do the shift/mask for you. In other
words, 0x40 is out of range here, since mux controller 0 is 32-way (5 bits).

Also, my question from V1 [1] still applies. Or, in other words, what
meaning does the above "parent register r/w functions" have in a device-tree
context?

Cheers,
Peter (would also like a threaded series next time)

[1] https://www.spinics.net/lists/devicetree/msg274845.html

> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +	};
> +
> +	..
> +	..
> +};
> +
> +mdio-mux-2 { // Mux consumer
> +	compatible = "mdio-mux";
> +	mux-controls = <&mux 1>;
> +	mdio-parent-bus = <&emdio2>;
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +
> +	mdio@0 {
> +		reg = <0x0>;
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +	};
> +
> +	mdio@1 {
> +		reg = <0x1>;
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +	};
> +
> +	..
> +	..
> +};
> +
>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/mux/reg-mux.txt b/Documentation/devicetree/bindings/mux/reg-mux.txt
new file mode 100644
index 000000000000..260c6f511b59
--- /dev/null
+++ b/Documentation/devicetree/bindings/mux/reg-mux.txt
@@ -0,0 +1,83 @@ 
+Generic register bitfield-based multiplexer controller bindings
+
+Define register bitfields to be used to control multiplexers. The parent
+device tree node must be a device node to provide register r/w access.
+
+Required properties:
+- compatible : "reg-mux"
+- #mux-control-cells : <1>
+- mux-reg-masks : an array of register offset and pre-shifted bitfield mask
+                  pairs, each describing a single mux control.
+* Standard mux-controller bindings as decribed in mux-controller.txt
+
+Optional properties:
+- idle-states : if present, the state the muxes will have when idle. The
+		special state MUX_IDLE_AS_IS is the default.
+
+The multiplexer state of each multiplexer is defined as the value of the
+bitfield described by the corresponding register offset and bitfield mask pair
+in the mux-reg-masks array, accessed through the parent register r/w functions.
+
+Example:
+
+&i2c0 {
+	fpga@66 { // fpga connected to i2c
+		compatible = "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c",
+			     "simple-mfd";
+		reg = <0x66>;
+
+		mux: mux-controller { // Mux Producer
+			compatible = "reg-mux";
+			#mux-control-cells = <1>;
+			mux-reg-masks = <0x54 0xf8>, /* 0: reg 0x54, bits 7:3 */
+					<0x54 0x07>; /* 1: reg 0x54, bits 2:0 */
+		};
+	};
+};
+
+mdio-mux-1 { // Mux consumer
+	compatible = "mdio-mux";
+	mux-controls = <&mux 0>;
+	mdio-parent-bus = <&emdio1>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	mdio@0 {
+		reg = <0x0>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	mdio@40 {
+		reg = <0x40>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	..
+	..
+};
+
+mdio-mux-2 { // Mux consumer
+	compatible = "mdio-mux";
+	mux-controls = <&mux 1>;
+	mdio-parent-bus = <&emdio2>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	mdio@0 {
+		reg = <0x0>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	mdio@1 {
+		reg = <0x1>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	..
+	..
+};
+