From patchwork Mon Jul 2 15:11:00 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Mack X-Patchwork-Id: 937966 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=zonque.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 41K9gd3RZFz9s29 for ; Tue, 3 Jul 2018 01:11:09 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752235AbeGBPLI (ORCPT ); Mon, 2 Jul 2018 11:11:08 -0400 Received: from mail.bugwerft.de ([46.23.86.59]:38988 "EHLO mail.bugwerft.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752213AbeGBPLI (ORCPT ); Mon, 2 Jul 2018 11:11:08 -0400 Received: from localhost.localdomain (i577BC1B3.versanet.de [87.123.193.179]) by mail.bugwerft.de (Postfix) with ESMTPSA id 83AF928CCBF; Mon, 2 Jul 2018 15:07:48 +0000 (UTC) From: Daniel Mack To: broonie@kernel.org, robh+dt@kernel.org Cc: alsa-devel@alsa-project.org, haojian.zhuang@gmail.com, robert.jarzmik@free.fr, lgirdwood@gmail.com, devicetree@vger.kernel.org, Daniel Mack Subject: [PATCH] ASoC: pxa-ssp: add support for an external clock in devicetree Date: Mon, 2 Jul 2018 17:11:00 +0200 Message-Id: <20180702151100.28999-1-daniel@zonque.org> X-Mailer: git-send-email 2.17.1 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Allow setting a clock called 'extclk' in the device of the ssp-dai device. If specified, this clock will be set to the mclk rate from the DAI's .set_sysclk() callback. The DAI will also configure itself to use that external clock. Signed-off-by: Daniel Mack --- .../bindings/sound/mrvl,pxa-ssp.txt | 8 ++++++ sound/soc/pxa/pxa-ssp.c | 25 +++++++++++++++++++ 2 files changed, 33 insertions(+) diff --git a/Documentation/devicetree/bindings/sound/mrvl,pxa-ssp.txt b/Documentation/devicetree/bindings/sound/mrvl,pxa-ssp.txt index efd3fb1f68d2..feef39b4a4fd 100644 --- a/Documentation/devicetree/bindings/sound/mrvl,pxa-ssp.txt +++ b/Documentation/devicetree/bindings/sound/mrvl,pxa-ssp.txt @@ -5,6 +5,14 @@ Required properties: compatible Must be "mrvl,pxa-ssp-dai" port A phandle reference to a PXA ssp upstream device +Optional properties: + + clock-names + clocks Through "clock-names" and "clocks", external clocks + can be configured. If a clock names "extclk" exists, + it will be set to the mclk rate of the audio stream + and be used as clock provider of the DAI. + Example: /* upstream device */ diff --git a/sound/soc/pxa/pxa-ssp.c b/sound/soc/pxa/pxa-ssp.c index f8339bb01251..c43fe3b9c79c 100644 --- a/sound/soc/pxa/pxa-ssp.c +++ b/sound/soc/pxa/pxa-ssp.c @@ -41,6 +41,7 @@ */ struct ssp_priv { struct ssp_device *ssp; + struct clk *extclk; unsigned long ssp_clk; unsigned int sysclk; unsigned int dai_fmt; @@ -205,6 +206,21 @@ static int pxa_ssp_set_dai_sysclk(struct snd_soc_dai *cpu_dai, u32 sscr0 = pxa_ssp_read_reg(ssp, SSCR0) & ~(SSCR0_ECS | SSCR0_NCS | SSCR0_MOD | SSCR0_ACS); + if (priv->extclk) { + int ret; + + /* + * For DT based boards, if an extclk is given, use it + * here and configure PXA_SSP_CLK_EXT. + */ + + ret = clk_set_rate(priv->extclk, freq); + if (ret < 0) + return ret; + + clk_id = PXA_SSP_CLK_EXT; + } + dev_dbg(&ssp->pdev->dev, "pxa_ssp_set_dai_sysclk id: %d, clk_id %d, freq %u\n", cpu_dai->id, clk_id, freq); @@ -773,6 +789,15 @@ static int pxa_ssp_probe(struct snd_soc_dai *dai) ret = -ENODEV; goto err_priv; } + + priv->extclk = devm_clk_get(dev, "extclk"); + if (IS_ERR(priv->extclk)) { + ret = PTR_ERR(priv->extclk); + if (ret == -EPROBE_DEFER) + return ret; + + priv->extclk = NULL; + } } else { priv->ssp = pxa_ssp_request(dai->id + 1, "SoC audio"); if (priv->ssp == NULL) {