From patchwork Fri May 25 10:01:17 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 920371 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=codeaurora.org header.i=@codeaurora.org header.b="H0eAUqJ/"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="baIOfFR9"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40shdq3GPKz9s0q for ; Fri, 25 May 2018 20:03:11 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965682AbeEYKBo (ORCPT ); Fri, 25 May 2018 06:01:44 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:45702 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965657AbeEYKBk (ORCPT ); Fri, 25 May 2018 06:01:40 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 190E060290; Fri, 25 May 2018 10:01:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1527242500; bh=R7UbEQrKv1U1FIdVslcjaAYCIBhOUFddZQiFlmKmqwI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=H0eAUqJ/rti72XmouAW7PjFlkDfNGZLxx4DNelpcrzd1b0c16YIvnOGp1AVBOEXOE ZEP6Sibn36/pYSKOA3oMIYGVY2CjSH6N5Qjs/AAH+PfCy8N5w9pXd91fUzPv8/8B7U HkFgDYvPwgPjul2rOQkIgLIuDI/yGX28FjYJhosQ= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED, T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from blr-ubuntu-173.qualcomm.com (blr-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: rnayak@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 4ADFA60FEA; Fri, 25 May 2018 10:01:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1527242499; bh=R7UbEQrKv1U1FIdVslcjaAYCIBhOUFddZQiFlmKmqwI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=baIOfFR9gxygD/OXBntA+9XwY6sTQC57KqkNb6JVeBTNG8aBdgLUSm+MysX+/yMYY qRW3a3/ntVFML1GIY91z8lpGSjzBnWsWUZmaIkKZ4bHh31c4P4P/eXiIymd6qG+PM1 Fib+Z0VP6rsX3/YxOxgTqGg32m5rQLtCo/pZD0UA= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 4ADFA60FEA Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rnayak@codeaurora.org From: Rajendra Nayak To: viresh.kumar@linaro.org, sboyd@kernel.org, andy.gross@linaro.org, ulf.hansson@linaro.org Cc: devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, collinsd@codeaurora.org, Rajendra Nayak Subject: [PATCH v2 2/6] dt-bindings: opp: Introduce qcom-opp bindings Date: Fri, 25 May 2018 15:31:17 +0530 Message-Id: <20180525100121.28214-3-rnayak@codeaurora.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180525100121.28214-1-rnayak@codeaurora.org> References: <20180525100121.28214-1-rnayak@codeaurora.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Qualcomm platforms, an OPP node needs to describe an additional level/corner value that is then communicated to a remote microprocessor by the CPU, which then takes some actions (like adjusting voltage values across various rails) based on the value passed. Describe these bindings in the qcom-opp bindings document. Signed-off-by: Rajendra Nayak Acked-by: Viresh Kumar Reviewed-by: Rob Herring --- .../devicetree/bindings/opp/qcom-opp.txt | 25 +++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100644 Documentation/devicetree/bindings/opp/qcom-opp.txt diff --git a/Documentation/devicetree/bindings/opp/qcom-opp.txt b/Documentation/devicetree/bindings/opp/qcom-opp.txt new file mode 100644 index 000000000000..db4d970c7ec7 --- /dev/null +++ b/Documentation/devicetree/bindings/opp/qcom-opp.txt @@ -0,0 +1,25 @@ +Qualcomm OPP bindings to descibe OPP nodes with corner/level values + +OPP tables for devices on Qualcomm platforms require an additional +platform specific corner/level value to be specified. +This value is passed on to the RPM (Resource Power Manager) by +the CPU, which then takes the necessary actions to set a voltage +rail to an appropriate voltage based on the value passed. + +The bindings are based on top of the operating-points-v2 bindings +described in Documentation/devicetree/bindings/opp/opp.txt +Additional properties are described below. + +* OPP Table Node + +Required properties: +- compatible: Allow OPPs to express their compatibility. It should be: + "operating-points-v2-qcom-level" + +* OPP Node + +Required properties: +- qcom,level: On Qualcomm platforms an OPP node can describe a positive value +representing a corner/level that's communicated with a remote microprocessor +(usually called the RPM) which then translates it into a certain voltage on +a voltage rail.