From patchwork Wed Dec 13 21:24:43 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Gerlach X-Patchwork-Id: 848248 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="W/EY8H13"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3yxqVC1hJnz9sNr for ; Thu, 14 Dec 2017 08:25:23 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753503AbdLMVZV (ORCPT ); Wed, 13 Dec 2017 16:25:21 -0500 Received: from fllnx210.ext.ti.com ([198.47.19.17]:18220 "EHLO fllnx210.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753360AbdLMVZU (ORCPT ); Wed, 13 Dec 2017 16:25:20 -0500 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllnx210.ext.ti.com (8.15.1/8.15.1) with ESMTP id vBDLOpIZ016176; Wed, 13 Dec 2017 15:24:51 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1513200291; bh=R6tKGLFKPYKNo+XvXp4ysdkD9ITVkzKJaYq2efs6cUk=; h=From:To:CC:Subject:Date; b=W/EY8H1306/Aq3a/eOVSS9G9xV4C702G7KVI6DvP2mm3t2jH3eUc1t33NZqdoIZkM hZwdkWkTeBFiQiEHjNN7ATZpsM3a1ysCGtormMJIEI9NuOykQUKwO2HZ+EXZGrpfMr fjrtawq8xS+GARM5tLJLWdZt3dUsQbyKAWHaPKVw= Received: from DLEE107.ent.ti.com (dlee107.ent.ti.com [157.170.170.37]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id vBDLOo2p004525; Wed, 13 Dec 2017 15:24:50 -0600 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Wed, 13 Dec 2017 15:24:50 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Wed, 13 Dec 2017 15:24:50 -0600 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id vBDLOoGF005388; Wed, 13 Dec 2017 15:24:50 -0600 Received: from localhost (uda0274052.dhcp.ti.com [128.247.59.203]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id vBDLOox25031; Wed, 13 Dec 2017 15:24:50 -0600 (CST) From: Dave Gerlach To: Tony Lindgren CC: , , , Dave Gerlach Subject: [PATCH] ARM: dts: am43xx: Fix inverted DS0_PULL_UP_DOWN_EN macro Date: Wed, 13 Dec 2017 15:24:43 -0600 Message-ID: <20171213212443.22632-1-d-gerlach@ti.com> X-Mailer: git-send-email 2.15.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Due to a mistake in documentation the DS0_PULL_UP_DOWN_EN macro was mistakenly defined as an active high bit, however setting the bit actually disables the internal pull resistor on the pin, so correct this macro and introduce a new DS0_PULL_UP_DOWN_DIS macro with the proper bit value set now that the documentation has been updated. Change based on AM437x Techninal Reference Manual SPRUHL7G Revised June 2017 Section 7.2.1. Signed-off-by: Dave Gerlach --- include/dt-bindings/pinctrl/am43xx.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/dt-bindings/pinctrl/am43xx.h b/include/dt-bindings/pinctrl/am43xx.h index a69e310789c5..6ce4a32f77d4 100644 --- a/include/dt-bindings/pinctrl/am43xx.h +++ b/include/dt-bindings/pinctrl/am43xx.h @@ -25,7 +25,8 @@ #define DS0_FORCE_OFF_MODE (1 << 24) #define DS0_INPUT (1 << 25) #define DS0_FORCE_OUT_HIGH (1 << 26) -#define DS0_PULL_UP_DOWN_EN (1 << 27) +#define DS0_PULL_UP_DOWN_EN (0 << 27) +#define DS0_PULL_UP_DOWN_DIS (1 << 27) #define DS0_PULL_UP_SEL (1 << 28) #define WAKEUP_ENABLE (1 << 29)