From patchwork Thu Jul 6 22:22:22 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 785287 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3x3XNy0BnWz9s06 for ; Fri, 7 Jul 2017 08:25:06 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="SmeFXBar"; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752763AbdGFWZE (ORCPT ); Thu, 6 Jul 2017 18:25:04 -0400 Received: from mail-wr0-f196.google.com ([209.85.128.196]:33443 "EHLO mail-wr0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752056AbdGFWZC (ORCPT ); Thu, 6 Jul 2017 18:25:02 -0400 Received: by mail-wr0-f196.google.com with SMTP id x23so3581284wrb.0; Thu, 06 Jul 2017 15:25:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=JWOmW3Bbc4DFW1MygRydNjkMRU9pK2725ssg/Kw/aNc=; b=SmeFXBarb+DRWyOqYjqhqhNZbE0wdHNQERoReZxaDAbBj3wRhS4f9juFI1KSlWDNmN pkgzQUI7DL9JcoTiSrrNrM40VHYKTzP5QwdKFp931r6142LTsN3K0JCXrXIqR7zCsveR iTAS/vas9f8qfeyCcj8KyPq4R2Fh23ddW3g3teqk5Zpmqe5N6Mho5QST8kt+HnhEUhgk QKh96kl6wFBauczRSZq1he2x2kUiTDHBuTL9j/T4k+DGEwmGRy14ukZYmxNWZCUtlRpM Q6qdZPv8ynP2IlogypqDAZb+XW1lWbzkt6VD8Mfaj+ZirdvlgUBbxInxlegtVgd/Bhkk uk4A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=JWOmW3Bbc4DFW1MygRydNjkMRU9pK2725ssg/Kw/aNc=; b=MHuKX6ZnL9gKTXRlqeYhl8NpGrNFmjEuxD/aAbK7jknd+zLpyifRmKvZPavA2dpeF3 taqYIyltijile28boFyVAvgR7jmxPI0EK+7sQbbYdNcq5T7EHz61Z3DTAvsEUgcpJsIq c5NhNuTKdLccT2msMan31vUCB9N3965uLchpeRUKw6ogZr53LhuNa/UypJbPu2yDnaI+ e/dDWYhdpMrVuBkLRNGYwCKODLR8eepO1F77DjE/8khvRN80jornywt3ZiGQqtyWvgHh /lsDMe71OcxOtWdV/NAWpNKFppZl+d1zrAJU71mknt4ZPOUDSnV5wBWrFgd+L0xFdrxx cU7A== X-Gm-Message-State: AIVw110lEAnGII5Jc9dW/pNv2CYHakuyhdsThqlTlB2PM16TpXOt4xSJ ZS8CvNKHHkhR1Kle3zk= X-Received: by 10.28.133.3 with SMTP id h3mr77001wmd.77.1499379901074; Thu, 06 Jul 2017 15:25:01 -0700 (PDT) Received: from fainelli-desktop.broadcom.com ([192.19.255.250]) by smtp.gmail.com with ESMTPSA id o131sm1781301wmd.26.2017.07.06.15.24.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 06 Jul 2017 15:25:00 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Rob Herring , Mark Rutland , Brian Norris , Gregory Fong , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE), Hauke Mehrtens , =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , Ralf Baechle , Markus Mayer , Arnd Bergmann , Eric Anholt , Justin Chen , Doug Berger , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE), linux-mips@linux-mips.org (open list:BROADCOM BCM47XX MIPS ARCHITECTURE), linux-pm@vger.kernerl.org, "Rafael J. Wysocki" Subject: [PATCH v3 1/4] dt-bindings: ARM: brcmstb: Update Broadcom STB Power Management binding Date: Thu, 6 Jul 2017 15:22:22 -0700 Message-Id: <20170706222225.9758-2-f.fainelli@gmail.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170706222225.9758-1-f.fainelli@gmail.com> References: <20170706222225.9758-1-f.fainelli@gmail.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Update the Broadcom STB Power Management binding document with new compatible strings for the DDR PHY and memory controller found on newer chips. Acked-by: Rob Herring Signed-off-by: Florian Fainelli --- Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt index 0d0c1ae81bed..790e6b0b8306 100644 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt @@ -164,6 +164,8 @@ Control registers for this memory controller's DDR PHY. Required properties: - compatible : should contain one of these + "brcm,brcmstb-ddr-phy-v71.1" + "brcm,brcmstb-ddr-phy-v72.0" "brcm,brcmstb-ddr-phy-v225.1" "brcm,brcmstb-ddr-phy-v240.1" "brcm,brcmstb-ddr-phy-v240.2" @@ -184,7 +186,9 @@ Sequencer DRAM parameters and control registers. Used for Self-Refresh Power-Down (SRPD), among other things. Required properties: -- compatible : should contain "brcm,brcmstb-memc-ddr" +- compatible : should contain one of these + "brcm,brcmstb-memc-ddr-rev-b.2.2" + "brcm,brcmstb-memc-ddr" - reg : the MEMC DDR register range Example: