From patchwork Tue Mar 28 20:55:10 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Gerlach X-Patchwork-Id: 744528 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3vt39c0plHz9s7j for ; Wed, 29 Mar 2017 07:57:08 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="fHsF7gTZ"; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755290AbdC1U4n (ORCPT ); Tue, 28 Mar 2017 16:56:43 -0400 Received: from fllnx210.ext.ti.com ([198.47.19.17]:63885 "EHLO fllnx210.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754922AbdC1U4m (ORCPT ); Tue, 28 Mar 2017 16:56:42 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllnx210.ext.ti.com (8.15.1/8.15.1) with ESMTP id v2SKtOvw011008; Tue, 28 Mar 2017 15:55:24 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1490734524; bh=JJXgJ5BZbxgZFBhTvdGcwXua4tDlpP82LvJZiTEaoKg=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=fHsF7gTZTgzgAwHeRsGAHaOdReRovcEquhVMHFHWds/dRGcjByq2BilAS5p6KpA3K f/piTmZSovfsN0+3aZDSpTFAlfXRkYqxqa7GDt4rvXAV7ChDA4+hV6sLm7SvMtz+Ua /dV3eNJRtxNTmdRxVFgdqwyDn3AxKk5VkPiWMRdY= Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v2SKtNK8008109; Tue, 28 Mar 2017 15:55:24 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.294.0; Tue, 28 Mar 2017 15:55:23 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v2SKtNsp007151; Tue, 28 Mar 2017 15:55:23 -0500 Received: from localhost (uda0274052.am.dhcp.ti.com [128.247.83.19]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id v2SKtN323326; Tue, 28 Mar 2017 15:55:23 -0500 (CDT) From: Dave Gerlach To: Rob Herring , Tony Lindgren , Santosh Shilimkar , Russell King CC: , , , , Dave Gerlach , Keerthy J Subject: [PATCH 1/2] Documentation: dt: Update ti,emif bindings Date: Tue, 28 Mar 2017 15:55:10 -0500 Message-ID: <20170328205511.21166-2-d-gerlach@ti.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170328205511.21166-1-d-gerlach@ti.com> References: <20170328205511.21166-1-d-gerlach@ti.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Update the Texas Instruments EMIF binding document to include the device tree bindings for ti,emif-am3352 and ti,emif-am4372 which are used by the ti-emif-sram driver to provide low-level PM functionality. Signed-off-by: Dave Gerlach Acked-by: Rob Herring --- .../devicetree/bindings/memory-controllers/ti/emif.txt | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/memory-controllers/ti/emif.txt b/Documentation/devicetree/bindings/memory-controllers/ti/emif.txt index 0db60470ebb6..8c0214b17c2b 100644 --- a/Documentation/devicetree/bindings/memory-controllers/ti/emif.txt +++ b/Documentation/devicetree/bindings/memory-controllers/ti/emif.txt @@ -8,6 +8,7 @@ of the EMIF IP and memory parts attached to it. Required properties: - compatible : Should be of the form "ti,emif-" where is the IP revision of the specific EMIF instance. + For am335x should be ti,emif-am3352. For am437x should be ti,emif-am4372. - phy-type : indicating the DDR phy type. Following are the @@ -21,6 +22,13 @@ Required properties: the value shall be "emif" where is the number of the EMIF instance with base 1. +Required only for "ti,emif-am3352" and "ti,emif-am4372": +- sram : Phandles for generic sram driver nodes, + first should be type 'protect-exec' for the driver to use to copy + and run PM functions, second should be regular pool to be used for + data region for code. See Documentation/devicetree/bindings/sram/sram.txt + for more details. + Optional properties: - cs1-used : Have this property if CS1 of this EMIF instance has a memory part attached to it. If there is a memory @@ -42,7 +50,7 @@ Optional properties: - hw-caps-temp-alert : Have this property if the controller has capability for generating SDRAM temperature alerts -Example: +-Examples: emif1: emif@0x4c000000 { compatible = "ti,emif-4d"; @@ -54,3 +62,11 @@ emif1: emif@0x4c000000 { hw-caps-ll-interface; hw-caps-temp-alert; }; + +/* From am33xx.dtsi */ +emif: emif@4c000000 { + compatible = "ti,emif-am3352"; + reg = <0x4C000000 0x1000>; + sram = <&pm_sram_code + &pm_sram_data>; +};