diff mbox series

[v2,2/6] dt-bindings: clock: Add APB, DMAC, GPIO bindings for Actions S500 SoC

Message ID 1998440a1debe07f838899ccbb15c72518b6b94f.1592941257.git.cristian.ciocaltea@gmail.com
State Superseded
Headers show
Series Add RMU and DMAC/GPIO clock support for Actions Semi S500 SoCs | expand

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Commit Message

Cristian Ciocaltea June 24, 2020, 5:47 p.m. UTC
Add the missing APB, DMAC and GPIO clock bindings constants for
Actions Semi S500 SoC.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
---
 include/dt-bindings/clock/actions,s500-cmu.h | 77 ++++++++++----------
 1 file changed, 40 insertions(+), 37 deletions(-)

Comments

Cristian Ciocaltea June 25, 2020, 12:50 p.m. UTC | #1
On Wed, Jun 24, 2020 at 03:36:00PM -0700, Stephen Boyd wrote:
> Quoting Cristian Ciocaltea (2020-06-24 10:47:53)
> > diff --git a/include/dt-bindings/clock/actions,s500-cmu.h b/include/dt-bindings/clock/actions,s500-cmu.h
> > index 030981cd2d56..a391d1651257 100644
> > --- a/include/dt-bindings/clock/actions,s500-cmu.h
> > +++ b/include/dt-bindings/clock/actions,s500-cmu.h
> > @@ -33,45 +33,48 @@
> >  #define CLK_BISP               15
> >  #define CLK_VCE                        16
> >  #define CLK_VDE                        17
> > +#define CLK_APB                        18
> > +#define CLK_DMAC               19
> >  
> >  /* peripheral device clock */
> > -#define CLK_TIMER              18
> > -#define CLK_I2C0               19
> > -#define CLK_I2C1               20
> > -#define CLK_I2C2               21
> > -#define CLK_I2C3               22
> > -#define CLK_PWM0               23
> > -#define CLK_PWM1               24
> > -#define CLK_PWM2               25
> > -#define CLK_PWM3               26
> > -#define CLK_PWM4               27
> > -#define CLK_PWM5               28
> > -#define CLK_SD0                        29
> > -#define CLK_SD1                        30
> > -#define CLK_SD2                        31
> > -#define CLK_SENSOR0            32
> > -#define CLK_SENSOR1            33
> > -#define CLK_SPI0               34
> > -#define CLK_SPI1               35
> > -#define CLK_SPI2               36
> > -#define CLK_SPI3               37
> > -#define CLK_UART0              38
> > -#define CLK_UART1              39
> > -#define CLK_UART2              40
> > -#define CLK_UART3              41
> > -#define CLK_UART4              42
> > -#define CLK_UART5              43
> > -#define CLK_UART6              44
> > -#define CLK_DE1                        45
> > -#define CLK_DE2                        46
> > -#define CLK_I2SRX              47
> > -#define CLK_I2STX              48
> > -#define CLK_HDMI_AUDIO         49
> > -#define CLK_HDMI               50
> > -#define CLK_SPDIF              51
> > -#define CLK_NAND               52
> > -#define CLK_ECC                        53
> > -#define CLK_RMII_REF           54
> 
> This number can't change. Just add new defines after and update the
> CLK_NR_CLKS define.

Thanks for pointing this out, I wasn't aware of this restriction.

I will add CLK_GPIO immediately after CLK_RMII_REF, since it is part
of the same peripheral device clock group, then I continue with CLK_APB
and CLK_DMAC, documenting that they belong to the system clock group
above.

> 
> > +#define CLK_GPIO               20
> > +#define CLK_TIMER              21
> > +#define CLK_I2C0               22
> > +#define CLK_I2C1               23
> > +#define CLK_I2C2               24
> > +#define CLK_I2C3               25
> > +#define CLK_PWM0               26
> > +#define CLK_PWM1               27
> > +#define CLK_PWM2               28
> > +#define CLK_PWM3               29
> > +#define CLK_PWM4               30
> > +#define CLK_PWM5               31
> > +#define CLK_SD0                        32
> > +#define CLK_SD1                        33
> > +#define CLK_SD2                        34
> > +#define CLK_SENSOR0            35
> > +#define CLK_SENSOR1            36
> > +#define CLK_SPI0               37
> > +#define CLK_SPI1               38
> > +#define CLK_SPI2               39
> > +#define CLK_SPI3               40
> > +#define CLK_UART0              41
> > +#define CLK_UART1              42
> > +#define CLK_UART2              43
> > +#define CLK_UART3              44
> > +#define CLK_UART4              45
> > +#define CLK_UART5              46
> > +#define CLK_UART6              47
> > +#define CLK_DE1                        48
> > +#define CLK_DE2                        49
> > +#define CLK_I2SRX              50
> > +#define CLK_I2STX              51
> > +#define CLK_HDMI_AUDIO         52
> > +#define CLK_HDMI               53
> > +#define CLK_SPDIF              54
> > +#define CLK_NAND               55
> > +#define CLK_ECC                        56
> > +#define CLK_RMII_REF           57
diff mbox series

Patch

diff --git a/include/dt-bindings/clock/actions,s500-cmu.h b/include/dt-bindings/clock/actions,s500-cmu.h
index 030981cd2d56..a391d1651257 100644
--- a/include/dt-bindings/clock/actions,s500-cmu.h
+++ b/include/dt-bindings/clock/actions,s500-cmu.h
@@ -33,45 +33,48 @@ 
 #define CLK_BISP		15
 #define CLK_VCE			16
 #define CLK_VDE			17
+#define CLK_APB			18
+#define CLK_DMAC		19
 
 /* peripheral device clock */
-#define CLK_TIMER		18
-#define CLK_I2C0		19
-#define CLK_I2C1		20
-#define CLK_I2C2		21
-#define CLK_I2C3		22
-#define CLK_PWM0		23
-#define CLK_PWM1		24
-#define CLK_PWM2		25
-#define CLK_PWM3		26
-#define CLK_PWM4		27
-#define CLK_PWM5		28
-#define CLK_SD0			29
-#define CLK_SD1			30
-#define CLK_SD2			31
-#define CLK_SENSOR0		32
-#define CLK_SENSOR1		33
-#define CLK_SPI0		34
-#define CLK_SPI1		35
-#define CLK_SPI2		36
-#define CLK_SPI3		37
-#define CLK_UART0		38
-#define CLK_UART1		39
-#define CLK_UART2		40
-#define CLK_UART3		41
-#define CLK_UART4		42
-#define CLK_UART5		43
-#define CLK_UART6		44
-#define CLK_DE1			45
-#define CLK_DE2			46
-#define CLK_I2SRX		47
-#define CLK_I2STX		48
-#define CLK_HDMI_AUDIO		49
-#define CLK_HDMI		50
-#define CLK_SPDIF		51
-#define CLK_NAND		52
-#define CLK_ECC			53
-#define CLK_RMII_REF		54
+#define CLK_GPIO		20
+#define CLK_TIMER		21
+#define CLK_I2C0		22
+#define CLK_I2C1		23
+#define CLK_I2C2		24
+#define CLK_I2C3		25
+#define CLK_PWM0		26
+#define CLK_PWM1		27
+#define CLK_PWM2		28
+#define CLK_PWM3		29
+#define CLK_PWM4		30
+#define CLK_PWM5		31
+#define CLK_SD0			32
+#define CLK_SD1			33
+#define CLK_SD2			34
+#define CLK_SENSOR0		35
+#define CLK_SENSOR1		36
+#define CLK_SPI0		37
+#define CLK_SPI1		38
+#define CLK_SPI2		39
+#define CLK_SPI3		40
+#define CLK_UART0		41
+#define CLK_UART1		42
+#define CLK_UART2		43
+#define CLK_UART3		44
+#define CLK_UART4		45
+#define CLK_UART5		46
+#define CLK_UART6		47
+#define CLK_DE1			48
+#define CLK_DE2			49
+#define CLK_I2SRX		50
+#define CLK_I2STX		51
+#define CLK_HDMI_AUDIO		52
+#define CLK_HDMI		53
+#define CLK_SPDIF		54
+#define CLK_NAND		55
+#define CLK_ECC			56
+#define CLK_RMII_REF		57
 
 #define CLK_NR_CLKS	       (CLK_RMII_REF + 1)