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Mon, 23 Oct 2023 09:21:22 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 39N9LLNv002219 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 23 Oct 2023 09:21:21 GMT Received: from zhenhuah-gv.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Mon, 23 Oct 2023 02:21:16 -0700 From: Zhenhua Huang To: , , , , , CC: , , , , , Zhenhua Huang Subject: [PATCH v1 1/5] dt-bindings: soc: qcom: Add memory_dump driver bindings Date: Mon, 23 Oct 2023 17:20:53 +0800 Message-ID: <1698052857-6918-2-git-send-email-quic_zhenhuah@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1698052857-6918-1-git-send-email-quic_zhenhuah@quicinc.com> References: <1698052857-6918-1-git-send-email-quic_zhenhuah@quicinc.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: QbXPCt9RCrhwsTqtYRnQu7oDKbecljkg X-Proofpoint-ORIG-GUID: QbXPCt9RCrhwsTqtYRnQu7oDKbecljkg X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-23_07,2023-10-19_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 mlxscore=0 suspectscore=0 bulkscore=0 phishscore=0 priorityscore=1501 malwarescore=0 impostorscore=0 adultscore=0 spamscore=0 clxscore=1015 mlxlogscore=843 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2310170001 definitions=main-2310230080 Add bindings for the QCOM Memory Dump driver providing debug facilities. Firmware dumps system cache, internal memory, peripheral registers to reserved DDR as per the table which populated by the driver, after crash and warm reset. Signed-off-by: Zhenhua Huang --- .../bindings/soc/qcom/qcom,mem-dump.yaml | 42 +++++++++++++++++++++ .../devicetree/bindings/sram/qcom,imem.yaml | 44 ++++++++++++++++++++++ 2 files changed, 86 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,mem-dump.yaml diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,mem-dump.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,mem-dump.yaml new file mode 100644 index 0000000..87f8f51 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,mem-dump.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/soc/qcom/qcom,mem-dump.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Qualcomm memory dump + +description: | + Qualcomm memory dump driver dynamically reserves memory and provides hints(id and size) + of debugging information based on specified protocols with firmware. Firmware then does + the real data capture. The debugging information includes cache contents, internal + memory, registers. After crash and warm reboot, firmware scans ids, + sizes and stores contents into reserved memory accordingly. Firmware then enters into full + dump mode which dumps whole DDR to PC through USB. + +maintainers: + - Zhenhua Huang + +properties: + compatible: + const: qcom,mem-dump + + memory-region: + maxItems: 1 + description: phandle to memory reservation for qcom,mem-dump region. + +required: + - compatible + - memory-region + +additionalProperties: false + +examples: + # minimum memory dump definition. + - | + mem-dump { + compatible = "qcom,mem-dump"; + memory-region = <&dump_mem>; + }; + +... diff --git a/Documentation/devicetree/bindings/sram/qcom,imem.yaml b/Documentation/devicetree/bindings/sram/qcom,imem.yaml index 8025a85..e9eaa7a 100644 --- a/Documentation/devicetree/bindings/sram/qcom,imem.yaml +++ b/Documentation/devicetree/bindings/sram/qcom,imem.yaml @@ -52,6 +52,40 @@ patternProperties: $ref: /schemas/remoteproc/qcom,pil-info.yaml# description: Peripheral image loader relocation region +patternProperties: + "^mem-dump-table@[0-9a-f]+$": + type: object + description: Used to store dump table base addr + properties: + compatible: + const: "qcom,qcom-imem-mem-dump-table" + + reg: + maxItems: 1 + + required: + - compatible + - reg + + additionalProperties: false + +patternProperties: + "^mem-dump-table-size@[0-9a-f]+$": + type: object + description: Used to store dump table size + properties: + compatible: + const: "qcom,qcom-imem-mem-dump-table-size" + + reg: + maxItems: 1 + + required: + - compatible + - reg + + additionalProperties: false + required: - compatible - reg @@ -76,5 +110,15 @@ examples: compatible = "qcom,pil-reloc-info"; reg = <0x94c 0xc8>; }; + + mem-dump-table@10 { + compatible = "qcom,qcom-imem-mem-dump-table"; + reg = <0x10 0x8>; + }; + + mem-dump-table-size@724 { + compatible = "qcom,qcom-imem-mem-dump-table-size"; + reg = <0x724 0x8>; + }; }; };