diff mbox series

[v7,2/3] dt-bindings: remoteproc: qcom: Add SC7280 WPSS support

Message ID 1635408817-14426-3-git-send-email-pillair@codeaurora.org
State Changes Requested
Headers show
Series Add support for sc7280 WPSS PIL loading | expand

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Commit Message

Rakesh Pillai Oct. 28, 2021, 8:13 a.m. UTC
Add WPSS PIL loading support for SC7280 SoCs.

Signed-off-by: Rakesh Pillai <pillair@codeaurora.org>
---
 .../bindings/remoteproc/qcom,sc7280-wpss-pil.yaml  | 194 +++++++++++++++++++++
 1 file changed, 194 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml

Comments

Stephen Boyd Oct. 28, 2021, 10:08 p.m. UTC | #1
Quoting Rakesh Pillai (2021-10-28 01:13:36)
> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml
> new file mode 100644
> index 0000000..96d11a4
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml
> @@ -0,0 +1,194 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-wpss-pil.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm SC7280 WPSS Peripheral Image Loader
> +
> +maintainers:
> +  - Bjorn Andersson <bjorn.andersson@linaro.org>
> +
> +description:
> +  This document defines the binding for a component that loads and boots firmware
> +  on the Qualcomm Technology Inc. WPSS.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - qcom,sc7280-wpss-pil
> +
> +  reg:
> +    maxItems: 1
> +    description:
> +      The base address and size of the qdsp6ss register
> +
> +  interrupts:
> +    items:
> +      - description: Watchdog interrupt
> +      - description: Fatal interrupt
> +      - description: Ready interrupt
> +      - description: Handover interrupt
> +      - description: Stop acknowledge interrupt
> +      - description: Shutdown acknowledge interrupt
> +
> +  interrupt-names:
> +    items:
> +      - const: wdog
> +      - const: fatal
> +      - const: ready
> +      - const: handover
> +      - const: stop-ack
> +      - const: shutdown-ack
> +
> +  clocks:
> +    items:
> +      - description: GCC WPSS AHB BDG Master clock
> +      - description: GCC WPSS AHB clock
> +      - description: GCC WPSS RSCP clock
> +      - description: XO clock
> +
> +  clock-names:
> +    items:
> +      - const: ahb_bdg
> +      - const: ahb
> +      - const: rscp
> +      - const: xo
> +
> +  power-domains:
> +    items:
> +      - description: CX power domain
> +      - description: MX power domain
> +
> +  power-domain-names:
> +    items:
> +      - const: cx
> +      - const: mx
> +
> +  resets:
> +    items:
> +      - description: AOSS restart
> +      - description: PDC SYNC
> +
> +  reset-names:
> +    items:
> +      - const: restart
> +      - const: pdc_sync
> +
> +  memory-region:

Does it need

    $ref: /schemas/types.yaml#/definitions/phandle

because it's a phandle?

> +    maxItems: 1
> +    description: Reference to the reserved-memory for the Hexagon core
> +
> +  firmware-name:
> +    $ref: /schemas/types.yaml#/definitions/string
> +    description:
> +      The name of the firmware which should be loaded for this remote
> +      processor.
> +
> +  qcom,halt-regs:
> +    $ref: /schemas/types.yaml#/definitions/phandle-array
> +    description:
> +      Phandle reference to a syscon representing TCSR followed by the
> +      three offsets within syscon for q6, modem and nc halt registers.
> +
> +  qcom,qmp:
> +    $ref: /schemas/types.yaml#/definitions/phandle
> +    description: Reference to the AOSS side-channel message RAM.
> +
> +  qcom,smem-states:
> +    $ref: /schemas/types.yaml#/definitions/phandle-array
> +    description: States used by the AP to signal the Hexagon core
> +    items:
> +      - description: Stop the modem
> +
> +  qcom,smem-state-names:
> +    $ref: /schemas/types.yaml#/definitions/string
> +    description: The names of the state bits used for SMP2P output
> +    items:
> +      - const: stop
> +
> +  glink-edge:
> +    type: object
> +    description:
> +      Qualcomm G-Link subnode which represents communication edge, channels
> +      and devices related to the ADSP.

Any properties of glink-edge that are required?

> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts-extended

interrupts

> +  - interrupt-names
> +  - clocks
> +  - clock-names
> +  - power-domains
> +  - power-domain-names
> +  - reset
> +  - reset-names
> +  - qcom,halt-regs
> +  - memory-region
> +  - qcom,qmp
> +  - qcom,smem-states
> +  - qcom,smem-state-names
> +  - glink-edge
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    #include <dt-bindings/clock/qcom,gcc-sc7280.h>
> +    #include <dt-bindings/clock/qcom,rpmh.h>
> +    #include <dt-bindings/power/qcom-rpmpd.h>
> +    #include <dt-bindings/reset/qcom,sdm845-aoss.h>
> +    #include <dt-bindings/reset/qcom,sdm845-pdc.h>
> +    #include <dt-bindings/mailbox/qcom-ipcc.h>
> +    remoteproc@8a00000 {
> +        compatible = "qcom,sc7280-wpss-pil";
> +        reg = <0x08a00000 0x10000>;
> +
> +        interrupts-extended = <&intc GIC_SPI 587 IRQ_TYPE_EDGE_RISING>,
> +                              <&wpss_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
> +                              <&wpss_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
> +                              <&wpss_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
> +                              <&wpss_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
> +                              <&wpss_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
> +        interrupt-names = "wdog", "fatal", "ready", "handover",
> +                          "stop-ack", "shutdown-ack";
> +
> +        clocks = <&gcc GCC_WPSS_AHB_BDG_MST_CLK>,
> +                 <&gcc GCC_WPSS_AHB_CLK>,
> +                 <&gcc GCC_WPSS_RSCP_CLK>,
> +                 <&rpmhcc RPMH_CXO_CLK>;
> +        clock-names = "ahb_bdg", "ahb",
> +                      "rscp", "xo";
> +
> +        power-domains = <&rpmhpd SC7280_CX>,
> +                        <&rpmhpd SC7280_MX>;
> +        power-domain-names = "cx", "mx";
> +
> +        memory-region = <&wpss_mem>;
> +
> +        qcom,qmp = <&aoss_qmp>;
> +
> +        qcom,smem-states = <&wpss_smp2p_out 0>;
> +        qcom,smem-state-names = "stop";
> +
> +        resets = <&aoss_reset AOSS_CC_WCSS_RESTART>,
> +                 <&pdc_reset PDC_WPSS_SYNC_RESET>;
> +        reset-names = "restart", "pdc_sync";
> +
> +        qcom,halt-regs = <&tcsr_mutex 0x37000>;
> +
> +        status = "disabled";

status can be left out of examples.

> +
> +        glink-edge {
> +            interrupts-extended = <&ipcc IPCC_CLIENT_WPSS
> +                                         IPCC_MPROC_SIGNAL_GLINK_QMP
> +                                         IRQ_TYPE_EDGE_RISING>;
> +            mboxes = <&ipcc IPCC_CLIENT_WPSS
> +                            IPCC_MPROC_SIGNAL_GLINK_QMP>;
> +
> +            label = "wpss";
> +            qcom,remote-pid = <13>;

There are a few properties here that don't seem to be required. Is that
intentional?
Rakesh Pillai Oct. 29, 2021, 10:46 a.m. UTC | #2
> -----Original Message-----
> From: Stephen Boyd <swboyd@chromium.org>
> Sent: Friday, October 29, 2021 3:38 AM
> To: Rakesh Pillai <pillair@codeaurora.org>; agross@kernel.org;
> bjorn.andersson@linaro.org; mathieu.poirier@linaro.org; ohad@wizery.com;
> p.zabel@pengutronix.de; robh+dt@kernel.org
> Cc: linux-arm-msm@vger.kernel.org; linux-remoteproc@vger.kernel.org;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org;
> sibis@codeaurora.org; mpubbise@codeaurora.org; kuabhs@chromium.org
> Subject: Re: [PATCH v7 2/3] dt-bindings: remoteproc: qcom: Add SC7280
> WPSS support
>
> > +
> > +        glink-edge {
> > +            interrupts-extended = <&ipcc IPCC_CLIENT_WPSS
> > +                                         IPCC_MPROC_SIGNAL_GLINK_QMP
> > +                                         IRQ_TYPE_EDGE_RISING>;
> > +            mboxes = <&ipcc IPCC_CLIENT_WPSS
> > +                            IPCC_MPROC_SIGNAL_GLINK_QMP>;
> > +
> > +            label = "wpss";
> > +            qcom,remote-pid = <13>;
> 
> There are a few properties here that don't seem to be required. Is that
> intentional?

Hi Stephen,
All the properties in the example are listed as required (except for status, which will be removed in the subsequent patchset).
Do you mean the glink-edge node properties ?

Thanks,
Rakesh Pillai.
Stephen Boyd Oct. 29, 2021, 7:04 p.m. UTC | #3
Quoting pillair@codeaurora.org (2021-10-29 03:46:03)
>
> > > +
> > > +        glink-edge {
> > > +            interrupts-extended = <&ipcc IPCC_CLIENT_WPSS
> > > +                                         IPCC_MPROC_SIGNAL_GLINK_QMP
> > > +                                         IRQ_TYPE_EDGE_RISING>;
> > > +            mboxes = <&ipcc IPCC_CLIENT_WPSS
> > > +                            IPCC_MPROC_SIGNAL_GLINK_QMP>;
> > > +
> > > +            label = "wpss";
> > > +            qcom,remote-pid = <13>;
> >
> > There are a few properties here that don't seem to be required. Is that
> > intentional?
>
> Hi Stephen,
> All the properties in the example are listed as required (except for status, which will be removed in the subsequent patchset).
> Do you mean the glink-edge node properties ?

Yes I mean all the properties in the glink-edge node. Are they required?
If so then we need to list them in the schema.
Rakesh Pillai Nov. 2, 2021, 1:45 p.m. UTC | #4
> -----Original Message-----
> From: Stephen Boyd <swboyd@chromium.org>
> Sent: Saturday, October 30, 2021 12:34 AM
> To: agross@kernel.org; bjorn.andersson@linaro.org;
> mathieu.poirier@linaro.org; ohad@wizery.com; p.zabel@pengutronix.de;
> pillair@codeaurora.org; robh+dt@kernel.org
> Cc: linux-arm-msm@vger.kernel.org; linux-remoteproc@vger.kernel.org;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org;
> sibis@codeaurora.org; mpubbise@codeaurora.org; kuabhs@chromium.org
> Subject: RE: [PATCH v7 2/3] dt-bindings: remoteproc: qcom: Add SC7280
> WPSS support
> 
> Quoting pillair@codeaurora.org (2021-10-29 03:46:03)
> >
> > > > +
> > > > +        glink-edge {
> > > > +            interrupts-extended = <&ipcc IPCC_CLIENT_WPSS
> > > > +                                         IPCC_MPROC_SIGNAL_GLINK_QMP
> > > > +                                         IRQ_TYPE_EDGE_RISING>;
> > > > +            mboxes = <&ipcc IPCC_CLIENT_WPSS
> > > > +                            IPCC_MPROC_SIGNAL_GLINK_QMP>;
> > > > +
> > > > +            label = "wpss";
> > > > +            qcom,remote-pid = <13>;
> > >
> > > There are a few properties here that don't seem to be required. Is
> > > that intentional?
> >
> > Hi Stephen,
> > All the properties in the example are listed as required (except for status,
> which will be removed in the subsequent patchset).
> > Do you mean the glink-edge node properties ?
> 
> Yes I mean all the properties in the glink-edge node. Are they required?
> If so then we need to list them in the schema.

Hi Stephen,
I have sent v8 with glink-edge properties also included in the dt-bindings.

Thanks,
Rakesh Pillai.
Rob Herring Nov. 2, 2021, 2:26 p.m. UTC | #5
On Thu, Oct 28, 2021 at 03:08:24PM -0700, Stephen Boyd wrote:
> Quoting Rakesh Pillai (2021-10-28 01:13:36)
> > diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml
> > new file mode 100644
> > index 0000000..96d11a4
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml
> > @@ -0,0 +1,194 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-wpss-pil.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Qualcomm SC7280 WPSS Peripheral Image Loader
> > +
> > +maintainers:
> > +  - Bjorn Andersson <bjorn.andersson@linaro.org>
> > +
> > +description:
> > +  This document defines the binding for a component that loads and boots firmware
> > +  on the Qualcomm Technology Inc. WPSS.
> > +
> > +properties:
> > +  compatible:
> > +    enum:
> > +      - qcom,sc7280-wpss-pil
> > +
> > +  reg:
> > +    maxItems: 1
> > +    description:
> > +      The base address and size of the qdsp6ss register
> > +
> > +  interrupts:
> > +    items:
> > +      - description: Watchdog interrupt
> > +      - description: Fatal interrupt
> > +      - description: Ready interrupt
> > +      - description: Handover interrupt
> > +      - description: Stop acknowledge interrupt
> > +      - description: Shutdown acknowledge interrupt
> > +
> > +  interrupt-names:
> > +    items:
> > +      - const: wdog
> > +      - const: fatal
> > +      - const: ready
> > +      - const: handover
> > +      - const: stop-ack
> > +      - const: shutdown-ack
> > +
> > +  clocks:
> > +    items:
> > +      - description: GCC WPSS AHB BDG Master clock
> > +      - description: GCC WPSS AHB clock
> > +      - description: GCC WPSS RSCP clock
> > +      - description: XO clock
> > +
> > +  clock-names:
> > +    items:
> > +      - const: ahb_bdg
> > +      - const: ahb
> > +      - const: rscp
> > +      - const: xo
> > +
> > +  power-domains:
> > +    items:
> > +      - description: CX power domain
> > +      - description: MX power domain
> > +
> > +  power-domain-names:
> > +    items:
> > +      - const: cx
> > +      - const: mx
> > +
> > +  resets:
> > +    items:
> > +      - description: AOSS restart
> > +      - description: PDC SYNC
> > +
> > +  reset-names:
> > +    items:
> > +      - const: restart
> > +      - const: pdc_sync
> > +
> > +  memory-region:
> 
> Does it need
> 
>     $ref: /schemas/types.yaml#/definitions/phandle
> 
> because it's a phandle?

No, standard property that already has a type.

Rob
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml
new file mode 100644
index 0000000..96d11a4
--- /dev/null
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml
@@ -0,0 +1,194 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-wpss-pil.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm SC7280 WPSS Peripheral Image Loader
+
+maintainers:
+  - Bjorn Andersson <bjorn.andersson@linaro.org>
+
+description:
+  This document defines the binding for a component that loads and boots firmware
+  on the Qualcomm Technology Inc. WPSS.
+
+properties:
+  compatible:
+    enum:
+      - qcom,sc7280-wpss-pil
+
+  reg:
+    maxItems: 1
+    description:
+      The base address and size of the qdsp6ss register
+
+  interrupts:
+    items:
+      - description: Watchdog interrupt
+      - description: Fatal interrupt
+      - description: Ready interrupt
+      - description: Handover interrupt
+      - description: Stop acknowledge interrupt
+      - description: Shutdown acknowledge interrupt
+
+  interrupt-names:
+    items:
+      - const: wdog
+      - const: fatal
+      - const: ready
+      - const: handover
+      - const: stop-ack
+      - const: shutdown-ack
+
+  clocks:
+    items:
+      - description: GCC WPSS AHB BDG Master clock
+      - description: GCC WPSS AHB clock
+      - description: GCC WPSS RSCP clock
+      - description: XO clock
+
+  clock-names:
+    items:
+      - const: ahb_bdg
+      - const: ahb
+      - const: rscp
+      - const: xo
+
+  power-domains:
+    items:
+      - description: CX power domain
+      - description: MX power domain
+
+  power-domain-names:
+    items:
+      - const: cx
+      - const: mx
+
+  resets:
+    items:
+      - description: AOSS restart
+      - description: PDC SYNC
+
+  reset-names:
+    items:
+      - const: restart
+      - const: pdc_sync
+
+  memory-region:
+    maxItems: 1
+    description: Reference to the reserved-memory for the Hexagon core
+
+  firmware-name:
+    $ref: /schemas/types.yaml#/definitions/string
+    description:
+      The name of the firmware which should be loaded for this remote
+      processor.
+
+  qcom,halt-regs:
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+    description:
+      Phandle reference to a syscon representing TCSR followed by the
+      three offsets within syscon for q6, modem and nc halt registers.
+
+  qcom,qmp:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description: Reference to the AOSS side-channel message RAM.
+
+  qcom,smem-states:
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+    description: States used by the AP to signal the Hexagon core
+    items:
+      - description: Stop the modem
+
+  qcom,smem-state-names:
+    $ref: /schemas/types.yaml#/definitions/string
+    description: The names of the state bits used for SMP2P output
+    items:
+      - const: stop
+
+  glink-edge:
+    type: object
+    description:
+      Qualcomm G-Link subnode which represents communication edge, channels
+      and devices related to the ADSP.
+
+required:
+  - compatible
+  - reg
+  - interrupts-extended
+  - interrupt-names
+  - clocks
+  - clock-names
+  - power-domains
+  - power-domain-names
+  - reset
+  - reset-names
+  - qcom,halt-regs
+  - memory-region
+  - qcom,qmp
+  - qcom,smem-states
+  - qcom,smem-state-names
+  - glink-edge
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/clock/qcom,gcc-sc7280.h>
+    #include <dt-bindings/clock/qcom,rpmh.h>
+    #include <dt-bindings/power/qcom-rpmpd.h>
+    #include <dt-bindings/reset/qcom,sdm845-aoss.h>
+    #include <dt-bindings/reset/qcom,sdm845-pdc.h>
+    #include <dt-bindings/mailbox/qcom-ipcc.h>
+    remoteproc@8a00000 {
+        compatible = "qcom,sc7280-wpss-pil";
+        reg = <0x08a00000 0x10000>;
+
+        interrupts-extended = <&intc GIC_SPI 587 IRQ_TYPE_EDGE_RISING>,
+                              <&wpss_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+                              <&wpss_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+                              <&wpss_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+                              <&wpss_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
+                              <&wpss_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
+        interrupt-names = "wdog", "fatal", "ready", "handover",
+                          "stop-ack", "shutdown-ack";
+
+        clocks = <&gcc GCC_WPSS_AHB_BDG_MST_CLK>,
+                 <&gcc GCC_WPSS_AHB_CLK>,
+                 <&gcc GCC_WPSS_RSCP_CLK>,
+                 <&rpmhcc RPMH_CXO_CLK>;
+        clock-names = "ahb_bdg", "ahb",
+                      "rscp", "xo";
+
+        power-domains = <&rpmhpd SC7280_CX>,
+                        <&rpmhpd SC7280_MX>;
+        power-domain-names = "cx", "mx";
+
+        memory-region = <&wpss_mem>;
+
+        qcom,qmp = <&aoss_qmp>;
+
+        qcom,smem-states = <&wpss_smp2p_out 0>;
+        qcom,smem-state-names = "stop";
+
+        resets = <&aoss_reset AOSS_CC_WCSS_RESTART>,
+                 <&pdc_reset PDC_WPSS_SYNC_RESET>;
+        reset-names = "restart", "pdc_sync";
+
+        qcom,halt-regs = <&tcsr_mutex 0x37000>;
+
+        status = "disabled";
+
+        glink-edge {
+            interrupts-extended = <&ipcc IPCC_CLIENT_WPSS
+                                         IPCC_MPROC_SIGNAL_GLINK_QMP
+                                         IRQ_TYPE_EDGE_RISING>;
+            mboxes = <&ipcc IPCC_CLIENT_WPSS
+                            IPCC_MPROC_SIGNAL_GLINK_QMP>;
+
+            label = "wpss";
+            qcom,remote-pid = <13>;
+        };
+    };