| Message ID | 1626661864-15473-2-git-send-email-hayashi.kunihiko@socionext.com |
|---|---|
| State | Accepted, archived |
| Headers | show |
| Series | dt-bindings: Update nvmem and UniPhier eFuse bindings | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/dt-meta-schema | success | |
| robh/dtbs-check | success |
On Mon, Jul 19, 2021 at 11:31:03AM +0900, Kunihiko Hayashi wrote: > Allow to extend expression of sub nodes to optionally indicate bit > position. This extension is needed to distinguish between different bit > positions in the same address. > > For example, there are two nvmem nodes starting with bit 4 and bit 0 > at the same address 0x54. In this case, it can be expressed as follows. > > trim@54,4 { > reg = <0x54 1>; > bits = <4 2>; > }; > trim@54,0 { > reg = <0x54 1>; > bits = <0 4>; > }; > > Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> > --- > Documentation/devicetree/bindings/nvmem/nvmem.yaml | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/nvmem/nvmem.yaml b/Documentation/devicetree/bindings/nvmem/nvmem.yaml > index b8dc3d2..9dfe196 100644 > --- a/Documentation/devicetree/bindings/nvmem/nvmem.yaml > +++ b/Documentation/devicetree/bindings/nvmem/nvmem.yaml > @@ -40,7 +40,7 @@ properties: > maxItems: 1 > > patternProperties: > - "^.*@[0-9a-f]+$": > + "^.*@[0-9a-f]+(,[0-9]+)?$": The bit offset should be hex. But I think the max would be 7 as we can assume 'reg' starts at a byte boundary. I'll fix up when applying. Rob
On Mon, 19 Jul 2021 11:31:03 +0900, Kunihiko Hayashi wrote: > Allow to extend expression of sub nodes to optionally indicate bit > position. This extension is needed to distinguish between different bit > positions in the same address. > > For example, there are two nvmem nodes starting with bit 4 and bit 0 > at the same address 0x54. In this case, it can be expressed as follows. > > trim@54,4 { > reg = <0x54 1>; > bits = <4 2>; > }; > trim@54,0 { > reg = <0x54 1>; > bits = <0 4>; > }; > > Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> > --- > Documentation/devicetree/bindings/nvmem/nvmem.yaml | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Applied, thanks!
diff --git a/Documentation/devicetree/bindings/nvmem/nvmem.yaml b/Documentation/devicetree/bindings/nvmem/nvmem.yaml index b8dc3d2..9dfe196 100644 --- a/Documentation/devicetree/bindings/nvmem/nvmem.yaml +++ b/Documentation/devicetree/bindings/nvmem/nvmem.yaml @@ -40,7 +40,7 @@ properties: maxItems: 1 patternProperties: - "^.*@[0-9a-f]+$": + "^.*@[0-9a-f]+(,[0-9]+)?$": type: object properties:
Allow to extend expression of sub nodes to optionally indicate bit position. This extension is needed to distinguish between different bit positions in the same address. For example, there are two nvmem nodes starting with bit 4 and bit 0 at the same address 0x54. In this case, it can be expressed as follows. trim@54,4 { reg = <0x54 1>; bits = <4 2>; }; trim@54,0 { reg = <0x54 1>; bits = <0 4>; }; Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> --- Documentation/devicetree/bindings/nvmem/nvmem.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)