From patchwork Mon Oct 26 19:32:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 1388026 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4CKlPm1kb3z9sRR for ; Tue, 27 Oct 2020 06:33:48 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1793296AbgJZTdj (ORCPT ); Mon, 26 Oct 2020 15:33:39 -0400 Received: from inva020.nxp.com ([92.121.34.13]:39528 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1793160AbgJZTdA (ORCPT ); Mon, 26 Oct 2020 15:33:00 -0400 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 828E91A0BBD; Mon, 26 Oct 2020 20:32:57 +0100 (CET) Received: from inva024.eu-rdc02.nxp.com (inva024.eu-rdc02.nxp.com [134.27.226.22]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 751051A0A87; Mon, 26 Oct 2020 20:32:57 +0100 (CET) Received: from fsr-ub1664-175.ea.freescale.net (fsr-ub1664-175.ea.freescale.net [10.171.82.40]) by inva024.eu-rdc02.nxp.com (Postfix) with ESMTP id B676F20308; Mon, 26 Oct 2020 20:32:56 +0100 (CET) From: Abel Vesa To: Mike Turquette , Stephen Boyd , Adam Ford , Marek Vasut , Lucas Stach , Rob Herring , Shawn Guo , Sascha Hauer , Fabio Estevam , Anson Huang , Jacky Bai , Peng Fan , Dong Aisheng Cc: NXP Linux Team , linux-arm-kernel@lists.infradead.org, Linux Kernel Mailing List , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, Abel Vesa Subject: [PATCH v4 05/14] dt-bindings: reset: imx8mp: Add media blk_ctl reset IDs Date: Mon, 26 Oct 2020 21:32:21 +0200 Message-Id: <1603740750-10385-6-git-send-email-abel.vesa@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1603740750-10385-1-git-send-email-abel.vesa@nxp.com> References: <1603740750-10385-1-git-send-email-abel.vesa@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org These will be used by the imx8mp for blk_ctl driver. Signed-off-by: Abel Vesa Acked-by: Rob Herring Reviewed-by: Dong Aisheng --- include/dt-bindings/reset/imx8mp-reset.h | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/include/dt-bindings/reset/imx8mp-reset.h b/include/dt-bindings/reset/imx8mp-reset.h index 6c7f17f..ba70248 100644 --- a/include/dt-bindings/reset/imx8mp-reset.h +++ b/include/dt-bindings/reset/imx8mp-reset.h @@ -52,4 +52,32 @@ #define IMX8MP_AUDIO_BLK_CTL_RESET_NUM 2 +#define IMX8MP_MEDIA_BLK_CTL_RESET_MIPI_DSI_PCLK 0 +#define IMX8MP_MEDIA_BLK_CTL_RESET_MIPI_DSI_CLKREF 1 +#define IMX8MP_MEDIA_BLK_CTL_RESET_MIPI_CSI_PCLK 2 +#define IMX8MP_MEDIA_BLK_CTL_RESET_MIPI_CSI_ACLK 3 +#define IMX8MP_MEDIA_BLK_CTL_RESET_LCDIF_PIXEL 4 +#define IMX8MP_MEDIA_BLK_CTL_RESET_LCDIF_APB 5 +#define IMX8MP_MEDIA_BLK_CTL_RESET_ISI_PROC 6 +#define IMX8MP_MEDIA_BLK_CTL_RESET_ISI_APB 7 +#define IMX8MP_MEDIA_BLK_CTL_RESET_BUS_BLK 8 +#define IMX8MP_MEDIA_BLK_CTL_RESET_MIPI_CSI2_PCLK 9 +#define IMX8MP_MEDIA_BLK_CTL_RESET_MIPI_CSI2_ACLK 10 +#define IMX8MP_MEDIA_BLK_CTL_RESET_LCDIF2_PIXEL 11 +#define IMX8MP_MEDIA_BLK_CTL_RESET_LCDIF2_APB 12 +#define IMX8MP_MEDIA_BLK_CTL_RESET_ISP1_COR 13 +#define IMX8MP_MEDIA_BLK_CTL_RESET_ISP1_AXI 14 +#define IMX8MP_MEDIA_BLK_CTL_RESET_ISP1_AHB 15 +#define IMX8MP_MEDIA_BLK_CTL_RESET_ISP0_COR 16 +#define IMX8MP_MEDIA_BLK_CTL_RESET_ISP0_AXI 17 +#define IMX8MP_MEDIA_BLK_CTL_RESET_ISP0_AHB 18 +#define IMX8MP_MEDIA_BLK_CTL_RESET_DWE_COR 19 +#define IMX8MP_MEDIA_BLK_CTL_RESET_DWE_AXI 20 +#define IMX8MP_MEDIA_BLK_CTL_RESET_DWE_AHB 21 +#define IMX8MP_MEDIA_BLK_CTL_RESET_MIPI_DSI2 22 +#define IMX8MP_MEDIA_BLK_CTL_RESET_LCDIF_AXI 23 +#define IMX8MP_MEDIA_BLK_CTL_RESET_LCDIF2_AXI 24 + +#define IMX8MP_MEDIA_BLK_CTL_RESET_NUM 25 + #endif