diff mbox series

[v2,7/7,RESEND] dt-bindings: interrupt-controller: Fix typos in loongson,liointc.yaml

Message ID 1592981136-3572-8-git-send-email-yangtiezhu@loongson.cn
State Changes Requested
Headers show
Series irqchip: Fix some issues and do some code cleanups about Loongson | expand

Checks

Context Check Description
robh/checkpatch warning total: 0 errors, 1 warnings, 10 lines checked
robh/checkpatch warning total: 0 errors, 1 warnings, 10 lines checked
robh/dt-meta-schema success
robh/dt-meta-schema success

Commit Message

Tiezhu Yang June 24, 2020, 6:45 a.m. UTC
Fix the following two typos in loongson,liointc.yaml:
fron -> from
it's -> its

Fixes: b6280c8bb6f5 ("dt-bindings: interrupt-controller: Add Loongson LIOINTC")
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
---
 .../devicetree/bindings/interrupt-controller/loongson,liointc.yaml    | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Sergei Shtylyov June 24, 2020, 8:42 a.m. UTC | #1
Hello!

On 24.06.2020 9:45, Tiezhu Yang wrote:

> Fix the following two typos in loongson,liointc.yaml:
> fron -> from
> it's -> its
> 
> Fixes: b6280c8bb6f5 ("dt-bindings: interrupt-controller: Add Loongson LIOINTC")
> Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
> ---
>   .../devicetree/bindings/interrupt-controller/loongson,liointc.yaml    | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml
> index b1db21e..13908ca 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml
> +++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml
> @@ -51,8 +51,8 @@ properties:
>       description: |
>         This property points how the children interrupts will be mapped into CPU
>         interrupt lines. Each cell refers to a parent interrupt line from 0 to 3
> -      and each bit in the cell refers to a children interrupt fron 0 to 31.
> -      If a CPU interrupt line didn't connected with liointc, then keep it's
> +      and each bit in the cell refers to a children interrupt from 0 to 31.
> +      If a CPU interrupt line didn't connected with liointc, then keep its

    "Connect", while you're at it?

>         cell with zero.
>       $ref: /schemas/types.yaml#/definitions/uint32-array
>       minItems: 4

MBR, Sergei
Tiezhu Yang June 24, 2020, 9:05 a.m. UTC | #2
On 06/24/2020 04:42 PM, Sergei Shtylyov wrote:
> Hello!
>
> On 24.06.2020 9:45, Tiezhu Yang wrote:
>
>> Fix the following two typos in loongson,liointc.yaml:
>> fron -> from
>> it's -> its
>>
>> Fixes: b6280c8bb6f5 ("dt-bindings: interrupt-controller: Add Loongson 
>> LIOINTC")
>> Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
>> ---
>> .../devicetree/bindings/interrupt-controller/loongson,liointc.yaml | 
>> 4 ++--
>>   1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git 
>> a/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml 
>> b/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml 
>>
>> index b1db21e..13908ca 100644
>> --- 
>> a/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml
>> +++ 
>> b/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml
>> @@ -51,8 +51,8 @@ properties:
>>       description: |
>>         This property points how the children interrupts will be 
>> mapped into CPU
>>         interrupt lines. Each cell refers to a parent interrupt line 
>> from 0 to 3
>> -      and each bit in the cell refers to a children interrupt fron 0 
>> to 31.
>> -      If a CPU interrupt line didn't connected with liointc, then 
>> keep it's
>> +      and each bit in the cell refers to a children interrupt from 0 
>> to 31.
>> +      If a CPU interrupt line didn't connected with liointc, then 
>> keep its
>
>    "Connect", while you're at it?

OK, thank you.
I will do it in the next version, maybe some days later.

>
>>         cell with zero.
>>       $ref: /schemas/types.yaml#/definitions/uint32-array
>>       minItems: 4
>
> MBR, Sergei
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml
index b1db21e..13908ca 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml
@@ -51,8 +51,8 @@  properties:
     description: |
       This property points how the children interrupts will be mapped into CPU
       interrupt lines. Each cell refers to a parent interrupt line from 0 to 3
-      and each bit in the cell refers to a children interrupt fron 0 to 31.
-      If a CPU interrupt line didn't connected with liointc, then keep it's
+      and each bit in the cell refers to a children interrupt from 0 to 31.
+      If a CPU interrupt line didn't connected with liointc, then keep its
       cell with zero.
     $ref: /schemas/types.yaml#/definitions/uint32-array
     minItems: 4