From patchwork Thu Jun 15 11:13:04 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Pisati X-Patchwork-Id: 776243 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3wpLTv6h8tz9ryQ for ; Thu, 15 Jun 2017 21:13:39 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="fzMtnUyY"; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752449AbdFOLNi (ORCPT ); Thu, 15 Jun 2017 07:13:38 -0400 Received: from mail-wr0-f194.google.com ([209.85.128.194]:36182 "EHLO mail-wr0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751902AbdFOLNJ (ORCPT ); Thu, 15 Jun 2017 07:13:09 -0400 Received: by mail-wr0-f194.google.com with SMTP id 77so2863710wrb.3; Thu, 15 Jun 2017 04:13:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Wd2Qm9lnLUuCvfrx9PUkcKsRKdhnT3Wcnzee0YXOUtI=; b=fzMtnUyYPEoPY5lG6xP2qVT6ujhsU2wWiwbw33LKP2ThFNArcBlz7IWIHowutV+Lpx kZfn9LukVe39NLLk0xE0gpq9z1HhfZLEvTQiVcbtBA3Li+6Oq3nq/mnJ8f7VqCBuIWHZ jRaPpDTZ/tXYP0Io4lJ13Hd3KdA3lFKQ5/XpC+4lRLL/KLOO7vX9QB/OlEJxfyefzFHd ZdhYpl642vcaA33EAtEb/uOFVBeZ2UHbvRVI2GSM8zZ+pwZ/2hGGpgrH6qqOzi6wedh/ KG0CfZA1/pu3mF5F+NgWXiAzKk2RcNJqpzlggIcRB+n6LcOz9x7HAfGnj8N4HaLCuoZw PLdg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Wd2Qm9lnLUuCvfrx9PUkcKsRKdhnT3Wcnzee0YXOUtI=; b=XavJU/7UKhOLDY2ykxmxsUJsvYQo45cWkMmBR3LBWPRk1UWO38KxAAdlxHLOqKv8OU 03x6jLk6ESrdeskHGK/RVmFL8I0vjNfE4D2tyf0tXoAaGsVB4VYbjhMSgfeQ7NsA/d4G JZHhtiRztySGg46C216QgC6jXiaOwjdTrWK0P4uBYEIY6m8gYFjnxXAD+iKIXLAN9ldz aSO5JPMl7kUKTnSxUkLEYBs47xTNKwnO8bdFJST1nFEy59q0F30O4ONrd0GgQW5yXgEr 8UFrYn5FUfx/VjqolRmjaDeCXyMpJAlM39JI8bU3xK9ZI2QdjzM9YKMPxGNMvJlq1Tgj U8vQ== X-Gm-Message-State: AKS2vOxTIyYSwUD10zLIIr6Z+G5R28cF4/FiyifRu/7b5Lkk+ogl2SsZ UgabQhzVpYo8OA== X-Received: by 10.223.133.4 with SMTP id 4mr3616049wrh.30.1497525187598; Thu, 15 Jun 2017 04:13:07 -0700 (PDT) Received: from gmail.com (net-93-146-98-251.cust.vodafonedsl.it. [93.146.98.251]) by smtp.gmail.com with ESMTPSA id k19sm3923765wmg.9.2017.06.15.04.13.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 15 Jun 2017 04:13:07 -0700 (PDT) From: Paolo Pisati To: Alan Tull , Moritz Fischer , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala Cc: linux-fpga@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 1/2] dt: bindings: fpga: add lattice machxo2 slave spi binding description Date: Thu, 15 Jun 2017 13:13:04 +0200 Message-Id: <1497525185-30232-2-git-send-email-p.pisati@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1497525185-30232-1-git-send-email-p.pisati@gmail.com> References: <1497525185-30232-1-git-send-email-p.pisati@gmail.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add dt binding documentation details for Lattice MachXO2 FPGA configuration over Slave SPI interface. Signed-off-by: Paolo Pisati Acked-by: Rob Herring --- .../bindings/fpga/lattice-machxo2-spi.txt | 29 ++++++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt diff --git a/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt b/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt new file mode 100644 index 0000000..c3ef26bd --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt @@ -0,0 +1,29 @@ +Lattice MachXO2 Slave SPI FPGA Manager + +Lattice MachXO2 FPGAs support a method of loading the bitstream over +'slave SPI' interface. + +See 'MachXO2ProgrammingandConfigurationUsageGuide.pdf' on www.latticesemi.com + +Required properties: +- compatible: should contain "lattice,machxo2-slave-spi" +- reg: spi chip select of the FPGA + +Example for full FPGA configuration: + + fpga-region0 { + compatible = "fpga-region"; + fpga-mgr = <&fpga_mgr_spi>; + #address-cells = <0x1>; + #size-cells = <0x1>; + }; + + spi1: spi@2000 { + ... + + fpga_mgr_spi: fpga-mgr@0 { + compatible = "lattice,machxo2-slave-spi"; + spi-max-frequency = <60000000>; + reg = <0>; + }; + };