| Message ID | 1497262984-2346-1-git-send-email-mperttunen@nvidia.com |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
On Mon, Jun 12, 2017 at 01:23:04PM +0300, Mikko Perttunen wrote: > The Tegra186 CCPLEX_CLUSTER area contains memory-mapped > registers that initiate CPU frequency/voltage transitions. > > Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> > Acked-by: Rob Herring <robh@kernel.org> > --- > .../arm/tegra/nvidia,tegra186-ccplex-cluster.txt | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt The ARM SoC maintainers don't like to pick up device tree bindings, so I'd prefer this to go through the cpufreq tree that also contains the driver patches. Presumably this wasn't merged through that tree because of the missing Acked-by by a device tree maintainer? Given that Rob's acked it now, maybe you can resend this to Viresh, who I think had picked up the driver? Thanks, Thierry
On 13.06.2017 15:42, Thierry Reding wrote: > On Mon, Jun 12, 2017 at 01:23:04PM +0300, Mikko Perttunen wrote: >> The Tegra186 CCPLEX_CLUSTER area contains memory-mapped >> registers that initiate CPU frequency/voltage transitions. >> >> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> >> Acked-by: Rob Herring <robh@kernel.org> >> --- >> .../arm/tegra/nvidia,tegra186-ccplex-cluster.txt | 20 ++++++++++++++++++++ >> 1 file changed, 20 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt > > The ARM SoC maintainers don't like to pick up device tree bindings, so > I'd prefer this to go through the cpufreq tree that also contains the > driver patches. Presumably this wasn't merged through that tree because > of the missing Acked-by by a device tree maintainer? Given that Rob's > acked it now, maybe you can resend this to Viresh, who I think had > picked up the driver? Sure, I'll do that. I guess the .dts change should then also go in that way? Mikko > > Thanks, > Thierry > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 13.06.2017 15:46, Mikko Perttunen wrote: > On 13.06.2017 15:42, Thierry Reding wrote: >> On Mon, Jun 12, 2017 at 01:23:04PM +0300, Mikko Perttunen wrote: >>> The Tegra186 CCPLEX_CLUSTER area contains memory-mapped >>> registers that initiate CPU frequency/voltage transitions. >>> >>> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> >>> Acked-by: Rob Herring <robh@kernel.org> >>> --- >>> .../arm/tegra/nvidia,tegra186-ccplex-cluster.txt | 20 >>> ++++++++++++++++++++ >>> 1 file changed, 20 insertions(+) >>> create mode 100644 >>> Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt >>> >> >> The ARM SoC maintainers don't like to pick up device tree bindings, so >> I'd prefer this to go through the cpufreq tree that also contains the >> driver patches. Presumably this wasn't merged through that tree because >> of the missing Acked-by by a device tree maintainer? Given that Rob's >> acked it now, maybe you can resend this to Viresh, who I think had >> picked up the driver? > > Sure, I'll do that. > I guess the .dts change should then also go in that > way? Or I guess not, since you applied it :) Cheers, Mikko > > Mikko > >> >> Thanks, >> Thierry >> -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Tue, Jun 13, 2017 at 03:47:39PM +0300, Mikko Perttunen wrote: > > > On 13.06.2017 15:46, Mikko Perttunen wrote: > > On 13.06.2017 15:42, Thierry Reding wrote: > > > On Mon, Jun 12, 2017 at 01:23:04PM +0300, Mikko Perttunen wrote: > > > > The Tegra186 CCPLEX_CLUSTER area contains memory-mapped > > > > registers that initiate CPU frequency/voltage transitions. > > > > > > > > Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> > > > > Acked-by: Rob Herring <robh@kernel.org> > > > > --- > > > > .../arm/tegra/nvidia,tegra186-ccplex-cluster.txt | 20 > > > > ++++++++++++++++++++ > > > > 1 file changed, 20 insertions(+) > > > > create mode 100644 > > > > Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt > > > > > > > > > > The ARM SoC maintainers don't like to pick up device tree bindings, so > > > I'd prefer this to go through the cpufreq tree that also contains the > > > driver patches. Presumably this wasn't merged through that tree because > > > of the missing Acked-by by a device tree maintainer? Given that Rob's > > > acked it now, maybe you can resend this to Viresh, who I think had > > > picked up the driver? > > > > Sure, I'll do that. > > > I guess the .dts change should then also go in that > > way? > > Or I guess not, since you applied it :) So the rule of thumb is that .dts changes should go through ARM SoC and device tree binding changes should be going through the same tree as the driver changes that implement the binding. Thierry
diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt new file mode 100644 index 000000000000..0c80cd8ee839 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt @@ -0,0 +1,20 @@ +NVIDIA Tegra CCPLEX_CLUSTER area + +The Tegra186 CCPLEX_CLUSTER area contains memory-mapped +registers that initiate CPU frequency/voltage transitions. + +Required properties: +- compatible: Should contain one of the following: + - "nvidia,tegra186-ccplex-cluster": for Tegra186 +- reg: Must contain an (offset, length) pair of the device's MMIO + register area +- nvidia,bpmp: phandle to BPMP device that can be queried for OPP tables + +Example: + + ccplex@e000000 { + compatible = "nvidia,tegra186-ccplex-cluster"; + reg = <0x0 0x0e000000 0x0 0x3fffff>, + + nvidia,bpmp = <&bpmp>; + };