| Message ID | 1467373026-27768-1-git-send-email-appanad@xilinx.com |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
On Fri, Jul 01, 2016 at 05:07:06PM +0530, Kedareswara rao Appana wrote: > +static int zynqmp_dma_chan_probe(struct zynqmp_dma_device *zdev, > + struct platform_device *pdev) > +{ > + struct zynqmp_dma_chan *chan; > + struct resource *res; > + struct device_node *node = pdev->dev.of_node; > + int err; > + > + chan = devm_kzalloc(zdev->dev, sizeof(*chan), GFP_KERNEL); > + if (!chan) > + return -ENOMEM; > + chan->dev = zdev->dev; > + chan->zdev = zdev; > + > + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); > + chan->regs = devm_ioremap_resource(&pdev->dev, res); > + if (IS_ERR(chan->regs)) > + return PTR_ERR(chan->regs); > + > + chan->bus_width = ZYNQMP_DMA_BUS_WIDTH_64; > + chan->dst_burst_len = ZYNQMP_DMA_AWLEN_RST_VAL; > + chan->src_burst_len = ZYNQMP_DMA_ARLEN_RST_VAL; > + err = of_property_read_u32(node, "xlnx,bus-width", &chan->bus_width); > + if ((err < 0) && ((chan->bus_width != ZYNQMP_DMA_BUS_WIDTH_64) || > + (chan->bus_width != ZYNQMP_DMA_BUS_WIDTH_128))) { > + dev_err(zdev->dev, "invalid bus-width value"); > + return err; > + } > + > + chan->is_dmacoherent = of_property_read_bool(node, "dma-coherent"); > + zdev->chan = chan; > + tasklet_init(&chan->tasklet, zynqmp_dma_do_tasklet, (ulong)chan); where is this killed? > + spin_lock_init(&chan->lock); > + INIT_LIST_HEAD(&chan->active_list); > + INIT_LIST_HEAD(&chan->pending_list); > + INIT_LIST_HEAD(&chan->done_list); > + INIT_LIST_HEAD(&chan->free_list); > + > + dma_cookie_init(&chan->common); > + chan->common.device = &zdev->common; > + list_add_tail(&chan->common.device_node, &zdev->common.channels); > + > + zynqmp_dma_init(chan); > + chan->irq = platform_get_irq(pdev, 0); > + if (chan->irq < 0) > + return -ENXIO; > + err = devm_request_irq(&pdev->dev, chan->irq, zynqmp_dma_irq_handler, 0, > + "zynqmp-dma", chan); this needs to be freed/diabled in remove, dont see that
On Fri, Jul 01, 2016 at 05:07:05PM +0530, Kedareswara rao Appana wrote: > Device-tree binding documentation for Xilinx zynqmp dma engine > used in Zynq UltraScale+ MPSoC. And I missed the cleanup part, so both applied now
Hi Vinod, > On Fri, Jul 01, 2016 at 05:07:05PM +0530, Kedareswara rao Appana wrote: > > Device-tree binding documentation for Xilinx zynqmp dma engine used in > > Zynq UltraScale+ MPSoC. > > And I missed the cleanup part, so both applied now Thanks for applying the patches will send patch for the cleanup part On top of this patch... Regards, Kedar. > > -- > ~Vinod -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Vinod, Thanks for the review... > > + > > + chan->is_dmacoherent = of_property_read_bool(node, "dma- > coherent"); > > + zdev->chan = chan; > > + tasklet_init(&chan->tasklet, zynqmp_dma_do_tasklet, (ulong)chan); > > where is this killed? This is killed in the zynqmp_dma_chan_remove() API. > > > + spin_lock_init(&chan->lock); > > + INIT_LIST_HEAD(&chan->active_list); > > + INIT_LIST_HEAD(&chan->pending_list); > > + INIT_LIST_HEAD(&chan->done_list); > > + INIT_LIST_HEAD(&chan->free_list); > > + zynqmp_dma_init(chan); > > + chan->irq = platform_get_irq(pdev, 0); > > + if (chan->irq < 0) > > + return -ENXIO; > > + err = devm_request_irq(&pdev->dev, chan->irq, > zynqmp_dma_irq_handler, 0, > > + "zynqmp-dma", chan); > > this needs to be freed/diabled in remove, dont see that It is freed in the zynqmp_dma_chan_remove() API. Regards, Kedar. -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/Documentation/devicetree/bindings/dma/xilinx/zynqmp_dma.txt b/Documentation/devicetree/bindings/dma/xilinx/zynqmp_dma.txt new file mode 100644 index 0000000..a784cdd --- /dev/null +++ b/Documentation/devicetree/bindings/dma/xilinx/zynqmp_dma.txt @@ -0,0 +1,27 @@ +Xilinx ZynqMP DMA engine, it does support memory to memory transfers, +memory to device and device to memory transfers. It also has flow +control and rate control support for slave/peripheral dma access. + +Required properties: +- compatible : Should be "xlnx,zynqmp-dma-1.0" +- reg : Memory map for gdma/adma module access. +- interrupt-parent : Interrupt controller the interrupt is routed through +- interrupts : Should contain DMA channel interrupt. +- xlnx,bus-width : Axi buswidth in bits. Should contain 128 or 64 +- clock-names : List of input clocks "clk_main", "clk_apb" + (see clock bindings for details) + +Optional properties: +- dma-coherent : Present if dma operations are coherent. + +Example: +++++++++ +fpd_dma_chan1: dma@fd500000 { + compatible = "xlnx,zynqmp-dma-1.0"; + reg = <0x0 0xFD500000 0x1000>; + interrupt-parent = <&gic>; + interrupts = <0 117 4>; + clock-names = "clk_main", "clk_apb"; + xlnx,bus-width = <128>; + dma-coherent; +};