From patchwork Thu Apr 21 17:20:56 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 613206 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3qrQWj0VTFz9t3n for ; Fri, 22 Apr 2016 03:21:05 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b=YVL9WzZP; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752524AbcDURVD (ORCPT ); Thu, 21 Apr 2016 13:21:03 -0400 Received: from mail-pa0-f45.google.com ([209.85.220.45]:36584 "EHLO mail-pa0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752486AbcDURVB (ORCPT ); Thu, 21 Apr 2016 13:21:01 -0400 Received: by mail-pa0-f45.google.com with SMTP id er2so30969753pad.3 for ; Thu, 21 Apr 2016 10:21:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to; bh=XIo/mrIdmHEn1kwX8bzEJ7lmYZwbKql04fvA6g0q/ns=; b=YVL9WzZPinqn/eEeGVP2v9zl/39CaDpbiVBs68Q3TVQeakOZOmUFK57R+iMz+03lD8 to1HozfQS3xGmb4aJKqbZz2rN7ZlC7kTBFtq+OIQYAXFcDM8+ogw18cGu/JowO6KSVIV SY92ijwD18+hw8YH+KGsnQtqIxXRgX/0hLjZY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to; bh=XIo/mrIdmHEn1kwX8bzEJ7lmYZwbKql04fvA6g0q/ns=; b=fHHa3FfLUthgcg5TGig5nz6wvnS6QkkHAEzuGjxTcyrglP4yjB+xschI39H7nT3mh8 uGAkUkGjjchVDzsUutTxuEHONeX4vj7Nc2vOQpLV3K8ePMwRjzsZM4Th3rZCIaIqnEaI YRLvPgp8uG0JPLKRk9Q7nrdLwzQpo+3d/Jhl8qAFcXRpLZ57wLSVhxvgrRbHo0syblm3 918K1m62Q5ng3gNcw7ljJliHYkboh0jD+55tXbXEaKCrTEL7dpA9Dx8sfGW1y4yBlKo0 R974waNSqrYamu8sYlR5dq3KmlLf0dfOnnlFGXbNey73rj24EnkrG89m2tN/1JDZ14lB mDhQ== X-Gm-Message-State: AOPr4FXRyNpv4HW7/Y0VoaHpvaqqEvUD+V1PYYbFF/VGRcQbQo41QF+4ZZBFDeItZmKpJKav X-Received: by 10.66.66.46 with SMTP id c14mr22148528pat.79.1461259260147; Thu, 21 Apr 2016 10:21:00 -0700 (PDT) Received: from localhost.localdomain (ip68-111-223-48.sd.sd.cox.net. [68.111.223.48]) by smtp.gmail.com with ESMTPSA id 184sm2459927pfd.43.2016.04.21.10.20.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 21 Apr 2016 10:20:59 -0700 (PDT) From: Bjorn Andersson To: Rob Herring Cc: Pawel Moll , Mark Rutland , Ian Campbell , Suman Anna , John Stultz , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, Bjorn Andersson Subject: [PATCH v2.1 1/9] dt-binding: remoteproc: Introduce Qualcomm WCNSS loader binding Date: Thu, 21 Apr 2016 10:20:56 -0700 Message-Id: <1461259256-28529-1-git-send-email-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1459222625-11440-2-git-send-email-bjorn.andersson@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Bjorn Andersson The document defines the binding for a component that loads firmware for and boots the Qualcomm WCNSS core. Signed-off-by: Bjorn Andersson Signed-off-by: Bjorn Andersson --- Rob, I got your Ack on v2, but I would like to make a small amendment before merging this. As we discussed related to the WiFi binding I should reference the mmio registers by a phandle to a DT node specifying the two necessary register blocks (ccu & dxe). These two register blocks are part of the riva/pronto (the two major versions) subsystem, that also contains the "pmu" register block, which is what I access here. Further more, the ccu block contains valuable information for debugging purposes that the implementation of this binding would find useful. I would therefor like to double this node (in the dts) as both the riva/pronto-pil and the target for the mmio phandle reference from the WiFi node. This works fine, but unless using reg-names for defining the order or the regs I get a messy ordering dependency between the two bindings. I do not know which of the other 7-8 register blocks we will add for debugging, but with the below change I can keep them in block order regardless of the order we implement them in. So, can I update the "reg" and add "reg-names" as below to the binding and depend on reg-names for the ordering of reg? Or should I speculatively add all ranges I know of to keep the order sane? Regards, Bjorn Changes since v2: - Modify definition of "reg" - Add "reg-names" - Update example .../bindings/remoteproc/qcom,wcnss-pil.txt | 124 +++++++++++++++++++++ 1 file changed, 124 insertions(+) create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.txt diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.txt b/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.txt new file mode 100644 index 000000000000..2ddca9be893e --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.txt @@ -0,0 +1,124 @@ +Qualcomm WCNSS Peripheral Image Loader + +This document defines the binding for a component that loads and boots firmware +on the Qualcomm WCNSS core. + +- compatible: + Usage: required + Value type: + Definition: must be one of: + "qcom,riva-pil", + "qcom,pronto-v1-pil", + "qcom,pronto-v2-pil" + +- reg: + Usage: required + Value type: + Definition: must contain base address and size of riva/pronto PMU + registers + +- reg-names: + Usage: required + Value type: + Definition: must contain "pmu" + +- interrupts-extended: + Usage: required + Value type: + Definition: must list the watchdog and fatal IRQs and may specify the + ready, handover and stop-ack IRQs + +- interrupt-names: + Usage: required + Value type: + Definition: should be "wdog", "fatal", optionally followed by "ready", + "handover", "stop-ack" + +- vddmx-supply: +- vddcx-supply: +- vddpx-supply: + Usage: required + Value type: + Definition: reference to the regulators to be held on behalf of the + booting of the WCNSS core + +- qcom,state: + Usage: optional + Value type: + Definition: reference to the SMEM state used to indicate to WCNSS that + it should shut down + +- qcom,state-names: + Usage: optional + Value type: + Definition: should be "stop" + += SUBNODES +A single subnode of the WCNSS PIL describes the attached rf module and its +resource dependencies. + +- compatible: + Usage: required + Value type: + Definition: must be one of: + "qcom,wcn3620", + "qcom,wcn3660", + "qcom,wcn3680" + +- clocks: + Usage: required + Value type: + Definition: should specify the xo clock and optionally the rf clock + +- clock-names: + Usage: required + Value type: + Definition: should be "xo", optionally followed by "rf" + +- vddxo-supply: +- vddrfa-supply: +- vddpa-supply: +- vdddig-supply: + Usage: required + Value type: + Definition: reference to the regulators to be held on behalf of the + booting of the WCNSS core + += EXAMPLE +The following example describes the resources needed to boot control the WCNSS, +with attached WCN3680, as it is commonly found on MSM8974 boards. + +pronto@fb21b000 { + compatible = "qcom,pronto-v2-pil"; + reg = <0xfb21b000 0x3000>; + reg-names = "pmu"; + + interrupts-extended = <&intc 0 149 1>, + <&wcnss_smp2p_slave 0 0>, + <&wcnss_smp2p_slave 1 0>, + <&wcnss_smp2p_slave 2 0>, + <&wcnss_smp2p_slave 3 0>; + interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack"; + + vddmx-supply = <&pm8841_s1>; + vddcx-supply = <&pm8841_s2>; + vddpx-supply = <&pm8941_s3>; + + qcom,state = <&wcnss_smp2p_out 0>; + qcom,state-names = "stop"; + + pinctrl-names = "default"; + pinctrl-0 = <&wcnss_pin_a>; + + iris { + compatible = "qcom,wcn3680"; + + clocks = <&rpmcc RPM_CXO_CLK_SRC>, <&rpmcc RPM_CXO_A2>; + clock-names = "xo", "rf"; + + vddxo-supply = <&pm8941_l6>; + vddrfa-supply = <&pm8941_l11>; + vddpa-supply = <&pm8941_l19>; + vdddig-supply = <&pm8941_s3>; + }; +};