From patchwork Fri Dec 11 04:10:00 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Raghavendra, Vignesh" X-Patchwork-Id: 555491 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 7F5CF140213 for ; Fri, 11 Dec 2015 15:11:40 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754380AbbLKELW (ORCPT ); Thu, 10 Dec 2015 23:11:22 -0500 Received: from devils.ext.ti.com ([198.47.26.153]:57664 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754178AbbLKEKy (ORCPT ); Thu, 10 Dec 2015 23:10:54 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id tBB4ARE2022392; Thu, 10 Dec 2015 22:10:27 -0600 Received: from DLEE70.ent.ti.com (dlemailx.itg.ti.com [157.170.170.113]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id tBB4ARTJ018426; Thu, 10 Dec 2015 22:10:27 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.224.2; Thu, 10 Dec 2015 22:10:27 -0600 Received: from uda0132425.apr.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id tBB4A2h8011860; Thu, 10 Dec 2015 22:10:23 -0600 From: Vignesh R To: Tony Lindgren , Brian Norris , Mark Brown CC: Rob Herring , Russell King , , , , , , , , Vignesh R Subject: [PATCH v5 5/5] ARM: dts: AM4372: add entry for qspi mmap region Date: Fri, 11 Dec 2015 09:40:00 +0530 Message-ID: <1449807000-6457-6-git-send-email-vigneshr@ti.com> X-Mailer: git-send-email 2.6.4 In-Reply-To: <1449807000-6457-1-git-send-email-vigneshr@ti.com> References: <1449807000-6457-1-git-send-email-vigneshr@ti.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add qspi memory mapped region entries for AM43xx based SoCs. Also, update the binding documents for the controller to document this change. Acked-by: Rob Herring Signed-off-by: Vignesh R --- v5: No changes. Documentation/devicetree/bindings/spi/ti_qspi.txt | 5 +++-- arch/arm/boot/dts/am4372.dtsi | 4 +++- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/spi/ti_qspi.txt b/Documentation/devicetree/bindings/spi/ti_qspi.txt index 809c3f334316..cc8304aa64ac 100644 --- a/Documentation/devicetree/bindings/spi/ti_qspi.txt +++ b/Documentation/devicetree/bindings/spi/ti_qspi.txt @@ -21,9 +21,10 @@ Optional properties: Example: +For am4372: qspi: qspi@4b300000 { - compatible = "ti,dra7xxx-qspi"; - reg = <0x47900000 0x100>, <0x30000000 0x3ffffff>; + compatible = "ti,am4372-qspi"; + reg = <0x47900000 0x100>, <0x30000000 0x4000000>; reg-names = "qspi_base", "qspi_mmap"; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi index d83ff9c9701e..e32d164102d1 100644 --- a/arch/arm/boot/dts/am4372.dtsi +++ b/arch/arm/boot/dts/am4372.dtsi @@ -963,7 +963,9 @@ qspi: qspi@47900000 { compatible = "ti,am4372-qspi"; - reg = <0x47900000 0x100>; + reg = <0x47900000 0x100>, + <0x30000000 0x4000000>; + reg-names = "qspi_base", "qspi_mmap"; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "qspi";