From patchwork Thu Oct 15 17:37:28 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Franklin S Cooper Jr X-Patchwork-Id: 530833 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 2732D140E3A for ; Fri, 16 Oct 2015 04:38:00 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752218AbbJORho (ORCPT ); Thu, 15 Oct 2015 13:37:44 -0400 Received: from mail-oi0-f51.google.com ([209.85.218.51]:33905 "EHLO mail-oi0-f51.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752486AbbJORhm (ORCPT ); Thu, 15 Oct 2015 13:37:42 -0400 Received: by oies66 with SMTP id s66so10731791oie.1; Thu, 15 Oct 2015 10:37:41 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=K3UILDzUv5whWlH3f3dA4iyk+lb/b09P9hwgP4gPUI4=; b=LZvtI5eP+asARdqWl3/CP4uZvBnmshjY1zeZzZsvSvfiiIbBk4/On+phFmVrhulqUK LVJmJWzBS2+zO2OQoOXl6S9ncXbb3PDgy3PlgBsB+huwYLLpH+qncTKlcK8LSy8vHSQw k61CXIn4SDtlImw8LtK6xBQqk3tckCYxueZQzGH/O1RjmLSyJFOuHBhiw/e5rt9bdJzq sfSNUUwfsZAS3lCd8X0wPc2PwbKuaqkXWbQDwjxgo9q0KcuJH7qesx3kw9aAknUhTgPL G/NEoZE3oFRHJzfnAucexq+Xx79cJsj0U0sziCVnh8REaDQfcylFzdqT6W8TZxvc9wyk Vwrg== X-Received: by 10.202.225.11 with SMTP id y11mr6411358oig.60.1444930661806; Thu, 15 Oct 2015 10:37:41 -0700 (PDT) Received: from localhost.localdomain (pool-71-97-41-79.dllstx.fios.verizon.net. [71.97.41.79]) by smtp.gmail.com with ESMTPSA id l133sm6771574oia.19.2015.10.15.10.37.40 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 15 Oct 2015 10:37:41 -0700 (PDT) From: Franklin S Cooper Jr To: linux-kernel@vger.kernel.org, rogerq@ti.com, devicetree@vger.kernel.org, linux-omap@vger.kernel.org, linux-mtd@lists.infradead.org, nsekhar@ti.com, computersforpeace@gmail.com, dwmw2@infradead.org, tony@atomide.com Cc: Franklin S Cooper Jr Subject: [PATCH v2 5/5] ARM: OMAP2+: Update GPMC and NAND DT binding documentation Date: Thu, 15 Oct 2015 12:37:28 -0500 Message-Id: <1444930648-19313-6-git-send-email-fcooper@ti.com> X-Mailer: git-send-email 2.6.1 In-Reply-To: <1444930648-19313-1-git-send-email-fcooper@ti.com> References: <1444930648-19313-1-git-send-email-fcooper@ti.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add additional details to the GPMC NAND documentation to clarify what is needed to enable NAND DMA prefetch. Signed-off-by: Franklin S Cooper Jr --- V2 Changes: Replace nand and Nand with NAND Specify the value dma-names should be set to Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt | 7 ++++++- Documentation/devicetree/bindings/mtd/gpmc-nand.txt | 2 ++ 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt b/Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt index 704be93..afae4b3 100644 --- a/Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt +++ b/Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt @@ -33,6 +33,10 @@ Required properties: As this will change in the future, filling correct values here is a requirement. +GPMC DMA information. + - dmas GPMC NAND prefetch dma channel + - dma-names Must be set to "rxtx" + Timing properties for child nodes. All are optional and default to 0. - gpmc,sync-clk-ps: Minimum clock period for synchronous mode, in picoseconds @@ -119,7 +123,8 @@ Example for an AM33xx board: ti,hwmods = "gpmc"; reg = <0x50000000 0x2000>; interrupts = <100>; - + dmas = <&edma 52>; + dma-names = "rxtx"; gpmc,num-cs = <8>; gpmc,num-waitpins = <2>; #address-cells = <2>; diff --git a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt index 253e6de..4b0c240 100644 --- a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt +++ b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt @@ -61,6 +61,8 @@ Example for an AM33xx board: ti,hwmods = "gpmc"; reg = <0x50000000 0x36c>; interrupts = <100>; + dmas = <&edma 52>; + dma-names = "rxtx"; gpmc,num-cs = <8>; gpmc,num-waitpins = <2>; #address-cells = <2>;