From patchwork Tue Sep 22 03:59:17 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matt Porter X-Patchwork-Id: 520829 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id DCE1914012C for ; Tue, 22 Sep 2015 13:59:35 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757732AbbIVD7d (ORCPT ); Mon, 21 Sep 2015 23:59:33 -0400 Received: from mail-ig0-f181.google.com ([209.85.213.181]:33051 "EHLO mail-ig0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757773AbbIVD70 (ORCPT ); Mon, 21 Sep 2015 23:59:26 -0400 Received: by igbkq10 with SMTP id kq10so92483326igb.0 for ; Mon, 21 Sep 2015 20:59:25 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=wWVJ7aNMO1aQmfWzF4V887ncaWun2JVh3a0i1n4lP6o=; b=PQeJQC0hru/jtRojjZr4ppyZuJ2J/d/AhcGUQxHHZulV8EAy20cuLUwaKexBVXn9XA M7cEgayKRyHRiPiXc6QscgOamEaQi6D9zPooG3ukuPECARsfUb/CEYUDAVWl2Nh18sy6 qsUnpBby4dCs/x1mHlx2wbqgNWZCtdaEllOAnzTVEyj79XLgTDklI1ZhfEorWWXqDmDb 01Z+rZRtXcnOrcdmErxoo0SnuTKQwA2uNcBArA1FPJiOO0QDy6bM897/owWgYtfepXbb gWc+tO0xBDCVGtb4rp5iYLmEcXPLIxKI3246+hwRpN5MXEDQJlrJc3XZdnwZDmFr2wJe ewjg== X-Gm-Message-State: ALoCoQmLpxFoIPS986k9CBDKXqT6tP9i4xJJrWaMWTq9kWuEHlE4HtlExlEL0GrHDI0+g3jexLtD X-Received: by 10.50.39.6 with SMTP id l6mr15257793igk.55.1442894365740; Mon, 21 Sep 2015 20:59:25 -0700 (PDT) Received: from bacon.ohporter.com (cpe-107-10-23-53.neo.res.rr.com. [107.10.23.53]) by smtp.gmail.com with ESMTPSA id y100sm544883ioi.29.2015.09.21.20.59.24 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 21 Sep 2015 20:59:25 -0700 (PDT) From: Matt Porter To: Devicetree List , Devicetree Spec List , Grant Likely , Frank Rowand , Rob Herring Cc: Mark Rutland , Pantelis Antoniou , Behan Webster , David Gibson , Tim Bird , Nicolas Ferre Subject: [RFC PATCH v2 2/3] Documentation: dt-bindings: spi: add generic YAML SPI slave binding Date: Mon, 21 Sep 2015 23:59:17 -0400 Message-Id: <1442894358-15606-3-git-send-email-mporter@konsulko.com> X-Mailer: git-send-email 2.5.1 In-Reply-To: <1442894358-15606-1-git-send-email-mporter@konsulko.com> References: <1442894358-15606-1-git-send-email-mporter@konsulko.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Convert the SPI slave portion of the spi-bus.txt binding to the standard YAML DT binding format. Signed-off-by: Matt Porter --- .../devicetree/bindings/spi/spi-slave.yaml | 108 +++++++++++++++++++++ 1 file changed, 108 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-slave.yaml diff --git a/Documentation/devicetree/bindings/spi/spi-slave.yaml b/Documentation/devicetree/bindings/spi/spi-slave.yaml new file mode 100644 index 0000000..8447bb9 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-slave.yaml @@ -0,0 +1,108 @@ +%YAML 1.2 +--- +version: 1 + +id: spi-slave + +title: SPI Slave Devices + +maintainer: + - name: Mark Brown + +description: > + SPI (Serial Peripheral Interface) slave bus devices are children of + of a SPI master bus device. +properties: + - name: "reg" + category: required + type: int + description: chip select address of device + + - name: "compatible" + category: required + type: string + description: compatible strings + + - name: "spi-max-frequency" + category: required + type: int + description: Maximum SPI clocking speed of device in Hz + + - name: "spi-cpol" + category: optional + type: empty + description: > + Empty property indicating device requires + inverse clock polarity (CPOL) mode + + - name: "spi-cpha" + category: optional + type: empty + description: > + Empty property indicating device requires + shifted clock phase (CPHA) mode + + - name: "spi-cs-high" + category: optional + type: empty + description: > + Empty property indicating device requires + chip select active high + + - name: "spi-3wire" + category: optional + type: empty + description: > + Empty property indicating device requires + 3-wire mode. + + - name: "spi-lsb-first" + category: optional + type: empty + description: > + Empty property indicating device requires + LSB first mode. + + - name: "spi-tx-bus-width" + category: optional + type: int + constraint: 1 || 2 || 4 + description: > + The bus width(number of data wires) that + used for MOSI. Defaults to 1 if not present. + + - name: "spi-rx-bus-width" + category: optional + type: int + constraint: 1 || 2 || 4 + description: > + The bus width(number of data wires) that + used for MISO. Defaults to 1 if not present. + +notes: > + Some SPI controllers and devices support Dual and Quad SPI transfer mode. + It allows data in the SPI system to be transferred in 2 wires(DUAL) or + 4 wires(QUAD). + Now the value that spi-tx-bus-width and spi-rx-bus-width can receive is + only 1(SINGLE), 2(DUAL) and 4(QUAD). Dual/Quad mode is not allowed when + 3-wire mode is used. + If a gpio chipselect is used for the SPI slave the gpio number will be + passed via the SPI master node cs-gpios property. + +examples: + - dts: | + spi@f00 { + ... + ethernet-switch@0 { + compatible = "micrel,ks8995m"; + spi-max-frequency = <1000000>; + reg = <0>; + }; + + codec@1 { + compatible = "ti,tlv320aic26"; + spi-max-frequency = <100000>; + reg = <1>; + }; + }; +...