From patchwork Wed Jul 8 16:11:23 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Griffin X-Patchwork-Id: 493058 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id C8D1D140280 for ; Thu, 9 Jul 2015 02:12:48 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934509AbbGHQLm (ORCPT ); Wed, 8 Jul 2015 12:11:42 -0400 Received: from mail-wi0-f174.google.com ([209.85.212.174]:35737 "EHLO mail-wi0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934306AbbGHQLj (ORCPT ); Wed, 8 Jul 2015 12:11:39 -0400 Received: by wiga1 with SMTP id a1so289628985wig.0 for ; Wed, 08 Jul 2015 09:11:38 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=rURyOR25MK9RXe8DhjPsjQ34vv3d1rwqerDJFMNjECk=; b=mqvs9nbiNcoHJtO69Il+BiR839WTe4wnXeUxY8bUELEqbiI8Q2mhiw/KCxCk59DUhO iiDLDOZaEb0ZqNT6+P/pTkQ+hpJxQU1mPpShaWRYnCU43WiMwh6ihOuYj6aapuzJ5F4w axv6e2pCb4nTl7lKU7IXqw1Y1sjeTyWbY0srVR7VXoFCl0EB8EyJr7Wx3XTi5XR6q5Tq DOzT5AwEU04ZISnhyW7HN/MMPG6OPEiUjjm9XUeCeKFDXuic20kwUdmosgamkMdB3IPl JCLdFwR85ZLJuSTodfOlm6vdKIQQx6su9f7opPg1SfFeB24kMYm/klRHvvTmogNlKP6c /8mw== X-Gm-Message-State: ALoCoQmzsyPre0/1JL2I3ZX1l/4E3a1nes7eiEvHzpvPZWg8I3KiMj0AOMXBDy9+yXooQydMTj3F X-Received: by 10.194.123.4 with SMTP id lw4mr20813865wjb.94.1436371898312; Wed, 08 Jul 2015 09:11:38 -0700 (PDT) Received: from localhost.localdomain (cpc14-aztw22-2-0-cust189.18-1.cable.virginm.net. [82.45.1.190]) by smtp.gmail.com with ESMTPSA id c3sm4230830wja.3.2015.07.08.09.11.36 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 08 Jul 2015 09:11:37 -0700 (PDT) From: Peter Griffin To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, srinivas.kandagatla@gmail.com, maxime.coquelin@st.com, patrice.chotard@st.com, vinod.koul@intel.com, dan.j.williams@intel.com Cc: peter.griffin@linaro.org, lee.jones@linaro.org, devicetree@vger.kernel.org, dmaengine@vger.kernel.org, ludovic.barre@st.com Subject: [PATCH 2/7] dmaengine: st_fdma: Add STMicroelectronics FDMA xbar DT binding documentation Date: Wed, 8 Jul 2015 17:11:23 +0100 Message-Id: <1436371888-27863-3-git-send-email-peter.griffin@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1436371888-27863-1-git-send-email-peter.griffin@linaro.org> References: <1436371888-27863-1-git-send-email-peter.griffin@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch adds the DT binding documentation for the FDMA xbar hw found on STi based chipsets from STMicroelectronics. Signed-off-by: Ludovic Barre Signed-off-by: Peter Griffin --- Documentation/devicetree/bindings/dma/st_fdma.txt | 24 +++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/Documentation/devicetree/bindings/dma/st_fdma.txt b/Documentation/devicetree/bindings/dma/st_fdma.txt index 1ec7470..655ee57 100644 --- a/Documentation/devicetree/bindings/dma/st_fdma.txt +++ b/Documentation/devicetree/bindings/dma/st_fdma.txt @@ -3,6 +3,24 @@ The FDMA is a general-purpose direct memory access controller capable of supporting 16 independent DMA channels. It accepts up to 32 DMA requests. The FDMA is based on a Slim processor which require a firmware. +To increase the number of peripheral request, the FDMA crossbar can mutiplex +up to 96 peripheral requests to one of 3 fdma controlers engine. + +* FDMA crossbar + +Required properties: +- compatible : Should be "st,fdma-xbar-1.0" +- reg : Should contain XBAR registers location and length +- dma-requests : Should contain the number of peripheral request supported +- #st,fdma-xbar-cells : Must be <1> + +Example: + xbar0: fdma-xbar-mpe@0 { + compatible = "st,fdma-xbar-1.0"; + reg = <0x8e80000 0x1000>; + dma-requests = <79>; + #st,fdma-xbar-cells = <1>; + }; * FDMA Controller @@ -18,6 +36,11 @@ Required properties: See: Documentation/devicetree/bindings/clock/clock-bindings.txt +Optional properties: +- st,fdma-xbar : Allow to plug controller behind the crossbar at offset X + 1. A phandle pointing to the FDMA crossbar + 2. Output offset <2..0> + Example: fdma1: fdma-app@1 { @@ -26,6 +49,7 @@ Example: interrupts = ; dma-channels = <16>; #dma-cells = <3>; + st,fdma-xbar = <&xbar0 0>; st,fw-name = "fdma_STiH407_1.elf"; clocks = <&CLK_S_C0_FLEXGEN CLK_FDMA>, <&CLK_S_C0_FLEXGEN CLK_TX_ICN_DMU>,