From patchwork Mon May 4 17:36:37 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Bresticker X-Patchwork-Id: 467759 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 613B81402A0 for ; Tue, 5 May 2015 03:37:12 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750990AbbEDRhJ (ORCPT ); Mon, 4 May 2015 13:37:09 -0400 Received: from mail-ob0-f202.google.com ([209.85.214.202]:32993 "EHLO mail-ob0-f202.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751437AbbEDRgw (ORCPT ); Mon, 4 May 2015 13:36:52 -0400 Received: by obcwm4 with SMTP id wm4so10290584obc.0 for ; Mon, 04 May 2015 10:36:51 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=y27bw5xjktBveoYrSymks7SPAjutYC/qV6rqgzT0cTs=; b=cVKTPdRWMCOBqip1Xnx5LLlJr+SwgaTtyeOsTxg+AFQkyFPBg1SlhQM2B6qiChBFSs +zFeujJHyWmP00gFcP6Tm7BBOYB6ZNY9XClfdG7tHMlVsmpXFZ1J2Rl5urSI4OAhhvOx umQONnc6fkkoA8/16gxAHmG3X4u+5eb7qzC2F2svtssYHA6Z4xz7TypeHCYZGonP+gts U2ivO2ofww0HQxMY8WWectfUls+4LDxUY7k0+nKligA/2hkIbu074fOR/nrSOFbEtwql iHOOsTRwjaPz/fE6Ggij8Y/SgaD3hU7I42JbNSD7EDQgNMyv8uJiouCpBKuTFUKQNL0T YsBg== X-Gm-Message-State: ALoCoQl4G/gYDWcK1QUJKJYU28I3uAeZCaWqiKKR+SGvNS3S2iPNNQAvI6uhbUSMNrNH91xI27oR X-Received: by 10.182.28.99 with SMTP id a3mr43700008obh.18.1430761011580; Mon, 04 May 2015 10:36:51 -0700 (PDT) Received: from corpmail-nozzle1-1.hot.corp.google.com ([100.108.1.104]) by gmr-mx.google.com with ESMTPS id l36si730539yhb.1.2015.05.04.10.36.50 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 04 May 2015 10:36:51 -0700 (PDT) Received: from abrestic.mtv.corp.google.com ([172.22.65.70]) by corpmail-nozzle1-1.hot.corp.google.com with ESMTP id 4F2Dcbwf.1; Mon, 04 May 2015 10:36:51 -0700 Received: by abrestic.mtv.corp.google.com (Postfix, from userid 137652) id 06858A491A; Mon, 4 May 2015 10:36:49 -0700 (PDT) From: Andrew Bresticker To: Stephen Warren , Thierry Reding , Alexandre Courbot Cc: devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-usb@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Andrew Bresticker , Jon Hunter , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Samuel Ortiz , Lee Jones Subject: [PATCH v8 4/9] mfd: Add binding document for NVIDIA Tegra XUSB Date: Mon, 4 May 2015 10:36:37 -0700 Message-Id: <1430761002-9327-5-git-send-email-abrestic@chromium.org> X-Mailer: git-send-email 2.2.0.rc0.207.ga3a616c In-Reply-To: <1430761002-9327-1-git-send-email-abrestic@chromium.org> References: <1430761002-9327-1-git-send-email-abrestic@chromium.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add a binding document for the XUSB host complex on NVIDIA Tegra124 and later SoCs. The XUSB host complex includes a mailbox for communication with the XUSB micro-controller and an xHCI host-controller. Signed-off-by: Andrew Bresticker Cc: Rob Herring Cc: Pawel Moll Cc: Mark Rutland Cc: Ian Campbell Cc: Kumar Gala Cc: Samuel Ortiz Cc: Lee Jones --- Changes from v7: - Move non-shared resources into child nodes. New for v7. --- .../bindings/mfd/nvidia,tegra124-xusb.txt | 37 ++++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/nvidia,tegra124-xusb.txt diff --git a/Documentation/devicetree/bindings/mfd/nvidia,tegra124-xusb.txt b/Documentation/devicetree/bindings/mfd/nvidia,tegra124-xusb.txt new file mode 100644 index 0000000..bc50110 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/nvidia,tegra124-xusb.txt @@ -0,0 +1,37 @@ +NVIDIA Tegra XUSB host copmlex +============================== + +The XUSB host complex on Tegra124 and later SoCs contains an xHCI host +controller and a mailbox for communication with the XUSB micro-controller. + +Required properties: +-------------------- + - compatible: For Tegra124, must contain "nvidia,tegra124-xusb". + Otherwise, must contain '"nvidia,-xusb", "nvidia,tegra124-xusb"' + where is tegra132. + - reg: Must contain the base and length of the XUSB FPCI registers. + - ranges: Bus address mapping for the XUSB block. Can be empty since the + mapping is 1:1. + - #address-cells: Must be 2. + - #size-cells: Must be 2. + +Example: +-------- + usb@0,70098000 { + compatible = "nvidia,tegra124-xusb"; + reg = <0x0 0x70098000 0x0 0x1000>; + ranges; + + #address-cells = <2>; + #size-cells = <2>; + + usb-host@0,70090000 { + compatible = "nvidia,tegra124-xhci"; + ... + }; + + mailbox { + compatible = "nvidia,tegra124-xusb-mbox"; + ... + }; + };