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irqchip: renesas-intc-irqpin: Add optional functional clock to bindings

Message ID 1426696644-25636-1-git-send-email-geert+renesas@glider.be
State Needs Review / ACK, archived
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Commit Message

Geert Uytterhoeven March 18, 2015, 4:37 p.m. UTC
This clock is managed since commit 705bc96c2c15313c ("irqchip:
renesas-intc-irqpin: Add minimal runtime PM support").

Also add an example while we're at.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 .../interrupt-controller/renesas,intc-irqpin.txt   | 29 ++++++++++++++++++++++
 1 file changed, 29 insertions(+)

Comments

Sergei Shtylyov March 18, 2015, 5:55 p.m. UTC | #1
Hello.

On 03/18/2015 07:37 PM, Geert Uytterhoeven wrote:

> This clock is managed since commit 705bc96c2c15313c ("irqchip:
> renesas-intc-irqpin: Add minimal runtime PM support").

> Also add an example while we're at.

> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
>   .../interrupt-controller/renesas,intc-irqpin.txt   | 29 ++++++++++++++++++++++
>   1 file changed, 29 insertions(+)

> diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt b/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt
> index 4f7946ae8adcdc04..e7cfcec056159b93 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt
> +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt
> @@ -25,3 +25,32 @@ Optional properties:
>     if different from the default 4 bits
>   - control-parent: disable and enable interrupts on the parent interrupt
>     controller, needed for some broken implementations
> +- clocks: Must contain a reference to the functional clock.  The property is
> +  mandatory if the hardware implements a controllable functional clock for
> +  the irqpin controller instance.
> +
> +
> +Example
> +-------
> +
> +	irqpin1: irqpin@e6900004 {

    The node name should be "interrupt-controller@e6900004".

> +		compatible = "renesas,intc-irqpin-r8a7740",
> +			     "renesas,intc-irqpin";
> +		#interrupt-cells = <2>;
> +		interrupt-controller;
> +		reg = <0xe6900004 4>,
> +			<0xe6900014 4>,
> +			<0xe6900024 1>,
> +			<0xe6900044 1>,
> +			<0xe6900064 1>;
> +		interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
> +			      0 149 IRQ_TYPE_LEVEL_HIGH
> +			      0 149 IRQ_TYPE_LEVEL_HIGH
> +			      0 149 IRQ_TYPE_LEVEL_HIGH
> +			      0 149 IRQ_TYPE_LEVEL_HIGH
> +			      0 149 IRQ_TYPE_LEVEL_HIGH
> +			      0 149 IRQ_TYPE_LEVEL_HIGH
> +			      0 149 IRQ_TYPE_LEVEL_HIGH>;

    Hm, 8 similar interrupts?

> +		clocks = <&mstp2_clks R8A7740_CLK_INTCA>;
> +		power-domains = <&pd_a4s>;
> +	};

WBR, Sergei

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Geert Uytterhoeven April 1, 2015, 9:06 a.m. UTC | #2
Hi Sergei,

On Wed, Mar 18, 2015 at 6:55 PM, Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
>> ---
>> a/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt
>> +++
>> b/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt

>> +Example
>> +-------
>> +
>> +       irqpin1: irqpin@e6900004 {
>
>
>    The node name should be "interrupt-controller@e6900004".

Will fix (also the dtsi).

>> +               compatible = "renesas,intc-irqpin-r8a7740",
>> +                            "renesas,intc-irqpin";
>> +               #interrupt-cells = <2>;
>> +               interrupt-controller;
>> +               reg = <0xe6900004 4>,
>> +                       <0xe6900014 4>,
>> +                       <0xe6900024 1>,
>> +                       <0xe6900044 1>,
>> +                       <0xe6900064 1>;
>> +               interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
>> +                             0 149 IRQ_TYPE_LEVEL_HIGH
>> +                             0 149 IRQ_TYPE_LEVEL_HIGH
>> +                             0 149 IRQ_TYPE_LEVEL_HIGH
>> +                             0 149 IRQ_TYPE_LEVEL_HIGH
>> +                             0 149 IRQ_TYPE_LEVEL_HIGH
>> +                             0 149 IRQ_TYPE_LEVEL_HIGH
>> +                             0 149 IRQ_TYPE_LEVEL_HIGH>;
>
>    Hm, 8 similar interrupts?

Yes, all interrupts are wired to the same parent on r8a7740.
However, the binding docs indeed don't mention that there should be
one entry per interrupt handled by the module. I'll fix that, too.

Thanks!

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
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diff mbox

Patch

diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt b/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt
index 4f7946ae8adcdc04..e7cfcec056159b93 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt
@@ -25,3 +25,32 @@  Optional properties:
   if different from the default 4 bits
 - control-parent: disable and enable interrupts on the parent interrupt
   controller, needed for some broken implementations
+- clocks: Must contain a reference to the functional clock.  The property is
+  mandatory if the hardware implements a controllable functional clock for
+  the irqpin controller instance.
+
+
+Example
+-------
+
+	irqpin1: irqpin@e6900004 {
+		compatible = "renesas,intc-irqpin-r8a7740",
+			     "renesas,intc-irqpin";
+		#interrupt-cells = <2>;
+		interrupt-controller;
+		reg = <0xe6900004 4>,
+			<0xe6900014 4>,
+			<0xe6900024 1>,
+			<0xe6900044 1>,
+			<0xe6900064 1>;
+		interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
+			      0 149 IRQ_TYPE_LEVEL_HIGH
+			      0 149 IRQ_TYPE_LEVEL_HIGH
+			      0 149 IRQ_TYPE_LEVEL_HIGH
+			      0 149 IRQ_TYPE_LEVEL_HIGH
+			      0 149 IRQ_TYPE_LEVEL_HIGH
+			      0 149 IRQ_TYPE_LEVEL_HIGH
+			      0 149 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp2_clks R8A7740_CLK_INTCA>;
+		power-domains = <&pd_a4s>;
+	};