From patchwork Fri Mar 6 23:46:33 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: tthayer@opensource.altera.com X-Patchwork-Id: 447496 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id B9C0E14011D for ; Sat, 7 Mar 2015 10:46:28 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755545AbbCFXq2 (ORCPT ); Fri, 6 Mar 2015 18:46:28 -0500 Received: from mail-bn1bn0100.outbound.protection.outlook.com ([157.56.110.100]:13664 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752333AbbCFXq1 (ORCPT ); Fri, 6 Mar 2015 18:46:27 -0500 Received: from tthayer-HP-Z620-Ubuntu.altera.com (64.129.157.38) by BLUPR03MB423.namprd03.prod.outlook.com (10.141.78.150) with Microsoft SMTP Server (TLS) id 15.1.106.11; Fri, 6 Mar 2015 23:46:23 +0000 From: To: , , , , , , , CC: , , , , , , , , , Subject: [RFC/PATCHv2 2/3] dt-binding: spi: spi-dw: Select 16b or 32b access for Designware SPI Date: Fri, 6 Mar 2015 17:46:33 -0600 Message-ID: <1425685594-26595-3-git-send-email-tthayer@opensource.altera.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1425685594-26595-1-git-send-email-tthayer@opensource.altera.com> References: <1425685594-26595-1-git-send-email-tthayer@opensource.altera.com> MIME-Version: 1.0 X-Originating-IP: [64.129.157.38] X-ClientProxiedBy: BY2PR06CA062.namprd06.prod.outlook.com (10.141.250.180) To BLUPR03MB423.namprd03.prod.outlook.com (10.141.78.150) Authentication-Results: kernel.org; dkim=none (message not signed) header.d=none; X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BLUPR03MB423; X-Forefront-Antispam-Report: BMV:1; SFV:NSPM; SFS:(10009020)(6009001)(76176999)(66066001)(50986999)(47776003)(86152002)(87976001)(229853001)(33646002)(2201001)(92566002)(77156002)(62966003)(122386002)(50466002)(19580395003)(42186005)(46102003)(86362001)(40100003)(19580405001)(50226001)(48376002)(2950100001)(53416004)(77096005); DIR:OUT; SFP:1101; SCL:1; SRVR:BLUPR03MB423; H:tthayer-HP-Z620-Ubuntu.altera.com; FPR:; SPF:None; MLV:sfv; LANG:en; X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(601004)(5002008)(5005006); SRVR:BLUPR03MB423; BCL:0; PCL:0; RULEID:; SRVR:BLUPR03MB423; X-Forefront-PRVS: 05079D8470 X-OriginatorOrg: opensource.altera.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Mar 2015 23:46:23.2231 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: BLUPR03MB423 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Thor Thayer Altera's Arria10 architecture requires a 32bit write accesses for APB peripherals. The current spi-dw driver uses 16bit accesses in some locations. This patch updated the bindings with an optional field in the devicetree to select 32bit accesses. Signed-off-by: Thor Thayer --- Documentation/devicetree/bindings/spi/spi-dw.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/spi/spi-dw.txt b/Documentation/devicetree/bindings/spi/spi-dw.txt index 7b63ed6..034dbdd 100644 --- a/Documentation/devicetree/bindings/spi/spi-dw.txt +++ b/Documentation/devicetree/bindings/spi/spi-dw.txt @@ -11,6 +11,7 @@ Required properties: Optional properties: - cs-gpios: see spi-bus.txt +- 32bit_access : use 32 bit register accesses Example: